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ST20-GP6 датащи(PDF) 37 Page - STMicroelectronics |
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ST20-GP6 датащи(HTML) 37 Page - STMicroelectronics |
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37 / 123 page ![]() ST20-GP6 37/123 6 Interrupt level controller There are 6 interrupts (of which 2 are external) generated in the ST20-GP6 system and each of these is assigned to one of the interrupt controller’s 8 inputs. Thus each of the interrupt controller’s inputs responds to zero or more of the 8 system interrupts. An interrupt handler routine is able to ascertain the source of an interrupt where two or more sys- tem interrupts are assigned to one handler by doing a device read from the InputInterrupts regis- ter (see Table 6.3) and examining the bits that correspond to the system interrupts assigned to that handler. The interrupt level controller has additional functionality to support the low power controller. The external interrupts are monitored and a signal is generated for the low power controller which tells it when any of them goes to a pre-determined level. This level is programmable for each external interrupt, and in addition each interrupt can be selectively masked. 6.1 Interrupt assignments The interrupts from the peripherals on the ST20-GP6 are assigned as follows: These interrupts are inputs to the interrupt level controller. This allows these interrupts to be assigned to any of eight interrupt priority levels and for multiple interrupts to share a priority level. 6.2 Interrupt level controller registers The interrupt level controller is programmable via configuration registers. These registers can be examined and set by the devlw (device load word) and devsw (device store word) instructions. IntPriority registers The priority assigned to each of the input interrupts is programmable via the IntPriority registers. The interrupt level controller asserts interrupt output N when one or more of the input interrupts with programmed priority equal to N are high. It is level sensitive and re-timed at the input, thus incurring one cycle of latency. Interrupt Peripheral Signals ORed together to generate interrupt signal 0 PIO A Compare function 1 PIO B Compare function 2 ASC0 ASC0TxBufEmpty, ASC0TxEmpty, ASC0RxBufFull, ASC0ErrorInterrupt 3 ASC1 ASC1TxBufEmpty, ASC1TxEmpty, ASC1RxBufFull, ASC1ErrorInterrupt 15:4 UNUSED UNUSED 16 Interrupt0 pin 17 Interrupt1 pin Table 6.1 Interrupt assignments |
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