ST20-GP6 datasheet(58/123 Pages) STMICROELECTRONICS

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ST20-GP6

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10.1 EMI signal descriptions

The following section describes the functions of the EMI pins. Note that a signal name preﬁxed by

not indicates active low.

MemAddr1-19

External address bus. The ST20-GP6 uses 30 bits of addressing internally but only the bottom 18

bits are brought out to external pins (

MemAddr2-19); MemAddr1 is generated by the EMI.

MemAddr1-19 is valid and constant for the whole duration of an external access. The memory

locations in each bank can be accessed at multiple addresses, as bits 20-29 are ignored when

making external accesses.

MemData0-15

External data bus. The data bus may be conﬁgured to be either 8 or 16 bits wide on a per bank

basis.

MemData0 is always the least signiﬁcant bit. MemData7 is the most signiﬁcant bit in 8-bit

mode and

MemData15 is the most signiﬁcant bit in 16-bit mode. When performing a write access

to a bank conﬁgured to be 8-bits wide,

MemData8-15 are held in a high-impedance state for the

duration of the access;

MemData0-7 behave according to the conﬁguration parameters as

speciﬁed in Section 10.4. When making a write to a bank conﬁgured to be 16-bits wide,

MemData0-15 behave according to the conﬁguration parameters.

notMemCE0-3

Chip enable strobes, one per bank. The

notMemCE0-3 strobe corresponding to the bank being

accessed will be active on both reads and writes to that bank.

notMemOE0

Output enable strobe. This strobe is shared between all four banks. The

notMemOE0 strobe will

be active only on reads to the bank.

notMemBE0-1

Byte enable strobes to select bytes within a 16-bit half-word. These strobes are shared between all

four banks.

notMemBE0 always corresponds to data on MemData0-7 whether the bus is currently

8 or 16 bits wide. When the EMI is accessing a bank conﬁgured to be 16 bits wide,

notMemBE1

corresponds to

MemData8-15. When the EMI is accessing a bank conﬁgured to be 8 bits wide,

notMemBE1 becomes address bit 0 and follows the timing of MemAddr1-19 for that bank.

MemWait

Halt external access. The EMI samples

MemWait at or just after the midpoint of an access. If

MemWait is sampled high, the access is stalled. MemWait will then continue to be sampled and

the access proceeds when

MemWait is sampled low. The action of MemWait may be disabled by

software, see Section 10.3. No mechanism is provided to abort an access; if

MemWait is held high

too long the EMI will become a contentious resource and may stall the ST20-GP6.

MemReadnotWrite

The

MemReadnotWrite pin indicates if the current access is a read or a write.

BusWidth

This signal is sampled immediately after reset and determines the initial bus width of all banks after

reset.

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