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ST20-GP6 датащи(PDF) 112 Page - STMicroelectronics |
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ST20-GP6 датащи(HTML) 112 Page - STMicroelectronics |
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112 / 123 page ![]() ST20-GP6 112/123 20.4 ClockIn timings Notes 1 Clock transitions must be monotonic within the range VIH to VIL (see Electrical Specifica- tions Chapter 18 on page 102). 2 In TimesOneMode, excursions from a 50/50 mark-space ratio will map directly into EMI phases which will then not be of equal duration. Table 20.4 ClockIn timings Figure 20.4 ClockIn timings 20.4.1 ClockIn frequency Nominal ClockIn frequency is 16.36800 Mhz ±50 ppm tolerance. This tolerance relates to the GPS system requirements and not for the device to function. Symbol Parameter Min Nom Max Units Notes tDCLDCH ClockIn pulse width low for PLL operation 20 40 ns 1, 2 tDCHDCL ClockIn pulse width high for PLL operation 20 40 ns 1, 2 tDCr ClockIn rise time for PLL operation 20 ns 1 tDCf ClockIn fall time for PLL operation 20 ns 1 tGDVCH GPSIF valid before clock rising edge 20 ns tCHGDX GPSIF valid after clock rising edge 10 ns 90% 10% tDCr 2.0V 0.8V 1.5V tDCLDCH tDCHDCL tDCf 90% 10% tGDVCH tCHGDX GPSIF |
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