ST20-GP6 datasheet(88/123 Pages) STMICROELECTRONICS

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ST20-GP6

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TxHalfEmpty is an early trigger for the reload routine, while TxEmpty indicates the completed

transmission of the data ﬁeld of the frame. Therefore, software using handshake should rely on

TxEmpty at the end of a data block to make sure that all data has really been transmitted.

15.4.2 Using the ASC interrupts when ﬁfos are enabled

To transmit a large number of characters back to back, the driver routine would write 16 characters

ASCTxBuffer, then every time a TxHalfEmpty interrupt ﬁred, it would write 8 more. When it had

nothing more to send, a

TxEmpty interrupt would tell it when everything has been transmitted.

When receiving, the driver could use

RxBufFull to interrupt every time a character came in. Alter-

natively, if data is coming in back-to-back, it could use

RxHalfFull to interrupt it when there was at

least 8 characters in the rxﬁfo to read. It would have as long as it takes to receive 8 characters to

respond to this interrupt before data would overrun. If less than eight character streamed in, and no

more were received for at least a timeout period, the driver could be woken up by one of the two

timeout interrupts,

TimeoutNotEmpty or TimeoutIdle.

15.5 ASC conﬁguration registers

ASCBaudRate register

The

ASCBaudRate register is the dual-function baud rate generator/reload register.

A read from this register returns the content of the timer, writing to it updates the reload register.

An auto-reload of the timer with the content of the reload register is performed each time the

ASCBaudRate register is written to. However, if the Run bit of the ASCControl register, see

Table 15.4, is 0 at the time the write operation to the

ASCBaudRate register is performed, the

timer will not be reloaded until the ﬁrst CPU clock cycle after the

Run bit is 1.

ASCBaudRate

ASC base address + #00

Read/Write

Bit

Bit ﬁeld

Write Function

Read Function

15:0

ReloadVal

16-bit reload value

16-bit count value

Table 15.1

ASCBaudRate register format

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