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ST20-GP6 датащи(PDF) 67 Page - STMicroelectronics |
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ST20-GP6 датащи(HTML) 67 Page - STMicroelectronics |
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67 / 123 page ![]() ST20-GP6 67/123 Low power timer The timer keeps track of real time, even when the internal clocks are stopped. The timer is a 64-bit counter which runs off an external clock ( LowPowerClockIn). This clock rate must not be more than one eighth of the system clock rate. Low power alarm There is also a 40-bit low power alarm counter. A write to the LPAlarmStart register starts the low power alarm counter and the ST20-GP6 enters low power mode. When the counter has counted down to zero, assuming no other valid wake-up sources occur first, the ST20-GP6 exits low power mode and the global clocks are turned back on. Whilst the clocks are turned off the LowPowerSta- tus pin is high, otherwise it is low. 11.2 Low power configuration registers The low power controller is allocated a 4k block of memory in the internal peripheral address space. Information on low power mode is stored in registers as detailed in the following section. The registers can be examined and set by the devlw (device load word) and devsw (device store word) instructions, see Table 7.19 on page 49. Note, they can not be accessed using memory instructions. LPTimerLS and LPTimerMS The LPTimerLS and LPTimerMS registers are the least significant word and most significant word of the LPTimer register. This enables the least significant or most significant word to be written independently without affecting the other word. Table 11.1 LPTimerLS register format Table 11.2 LPTimerMS register format When the LPTimer register is written, the low power timer is stopped and the new value is avail- able to be written to the low power timer. LPTimerStart A write to the LPTimerStart register starts the low power timer counter. The counter is stopped and the LPTimerStart register reset if either counter word (LPTimerLS and LPTimerMS)iswrit- ten. LPTimerLS LPC base address + #400 Read/Write Bit Bit field Function 31:0 LPTimerLS Least significant word of the low power timer. LPTimerMS LPC base address + #404 Read/Write Bit Bit field Function 31:0 LPTimerMS Most significant word of the low power timer. |
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