ST20-GP6 datasheet(68/123 Pages) STMICROELECTRONICS

68 / 123 page

ST20-GP6

68/123

Note, setting the

LPTimerStart register to zero does not stop the timer.

Table 11.3

LPTimerStart register format

LPAlarmLS and LPAlarmMS

The

LPAlarmLS and LPAlarmMS registers are the least signiﬁcant word and most signiﬁcant word

of the

LPAlarm register. This is used to program the low power alarm.

Table 11.4

LPAlarmLS register format

Table 11.5

LPAlarmMS register format

LPAlarmStart

A write to the

LPAlarmStart register starts the low power alarm counter. The counter is stopped

and the

LPStart register reset if either counter word (LPTimerLS and LPTimerMS) is written.

Table 11.6

LPAlarmStart register format

LPSysPll

The

LPSysPll register controls the System Clock PLL operation when low power mode is entered.

This allows a compromise between wake-up time and power consumption during stand-by.

Table 11.7

LPSysPll register format

LPTimerStart

LPC base address + #408

Write

Bit

Bit ﬁeld

Function

LPTimerStart

A write to this bit starts the low power timer counter.

LPAlarmLS

LPC base address + #410

Read/Write

Bit

Bit ﬁeld

Function

31:0

LPAlarmLS

Least signiﬁcant word of the low power alarm.

LPAlarmMS

LPC base address + #414

Read/Write

Bit

Bit ﬁeld

Function

7:0

LPAlarmMS

Most signiﬁcant word of the low power alarm.

LPAlarmStart

LPC base address + #418

Write

Bit

Bit ﬁeld

Function

LPAlarmStart

A write to this bit starts the low power alarm counter.

LPSysPll

LPC base address + #420

Read/Write

Bit

Bit ﬁeld

Function

1:0

LPSysPll

Determines the system clock PLL when low power mode is entered, as follows:

LPSysPll1:0

System clock

PLL off

PLL reference on and power on

PLL on

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