ADP1052ACPZ-R7 datasheet(106/113 Pages) AD

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ADP1052

Data Sheet

Rev. B | Page 106 of 113

Bits

Bit Name/Function

R/W

Description

[2:0]

Offset step size

R/W

These bits specify the programming step size for Register 0xFE5B to Register 0xFE60, Bits[6:4] and Bits[2:0].

Bit 2

Bit 1

Bit 0

LSB Step Size (ns)

Table 187. Register 0xFE67—Open-Loop Operation Settings

Bits

Bit Name/Function

R/W

Description

Reserved

Reserved.

Pulse skipping mode enable

R/W

1 = enables the pulse skipping mode. If the ADP1052 requires a modulation value that

is less than the threshold set by Register 0xFE69, pulse skipping is in use.

SR2 open-loop operation enable

R/W

This bit is set when SR2 is in open-loop operation mode.

SR1 open-loop operation enable

R/W

This bit is set when SR1 is in open-loop operation mode.

OUTD open-loop operation enable

R/W

This bit is set when OUTD is in open-loop operation mode.

OUTC open-loop operation enable

R/W

This bit is set when OUTC is in open-loop operation mode.

OUTB open-loop operation enable

R/W

This bit is set when OUTB is in open-loop operation mode.

OUTA open-loop operation enable

R/W

This bit is set when OUTA is in open-loop operation mode.

Table 188. Register 0xFE68—Offset Setting for SR1 and SR2

Bits

Bit Name/Function

R/W

Description

[7:0]

The offset setting for SR1/SR2

R/W

If SR_RC_FAULT flag is triggered and Register 0xFE03[7:6] = 11, these bits set the

offset value (tOFFSET) on the SR1 and SR2 rising edges. The rising edges are moved

left from tRx + tMODU_LIMIT by tOFFSET. Each step corresponds to 5 ns.

Table 189. Register 0xFE69—Pulse Skipping Mode Threshold

Bits

Bit Name/Function

R/W

Description

[7:0]

Pulse skipping mode

threshold

R/W

These bits set the modulation pulse width threshold for pulse skipping. Each LSB is 5 ns.

Table 190. Register 0xFE6A—CS3_OC_FAULT_LIMIT

Bits

Bit Name/Function

R/W

Description

[7:0]

CS3_OC_FAULT_LIMIT

R/W

The eight MSB value of the CS3 value register in Register 0xFEA9 is compared with this 8-bit

number. If the 8 MSB value is greater, the CS3_OC_FAULT flag is set.

Table 191. Register 0xFE6B—Modulation Threshold for OVP Selection

Bits

Bit Name/Function

R/W

Description

[7:0]

Modulation threshold

for conditional

OVP responses

R/W

This value sets modulation threshold for conditional OVP response. When the real-time modu-

lation value is above this threshold, the LARGE_MODULATION flag in Register 0xFE6C[2] is set.

Switching Frequency Range (kHz)

Resolution Corresponding to LSB (ns)

49 to 87

97.5 to 184

195.5 to 379

390.5 to 625

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