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ADP1052ACPZ-R7 датащи(PDF) 42 Page - Analog Devices |
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ADP1052ACPZ-R7 датащи(HTML) 42 Page - Analog Devices |
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42 / 113 page ![]() ADP1052 Data Sheet Rev. B | Page 42 of 113 To trim the errors introduced by the resistor divider, use the following procedure: 1. Set the VOUT_COMMAND (Register 0x21) with the nominal output voltage value. Set the VOUT_SCALE_ LOOP command (Register 0x29) and the VOUT_SCALE_ MONITOR command (Register 0x2A), based on the resistor divider information. 2. Enable the power supply with the no load current. The voltage of the VS± pins is divided down by the VS resistor divider to give a target of 1 V at the VS± pins. 3. Adjust the VOUT_CAL_OFFSET trim (Register 0x23) to ensure that the output voltage is exactly the target output voltage. 4. Adjust the VS gain trim register (Register 0xFE20) when the READ_VOUT reading in Register 0x8B is the exact output voltage reading. VIN TRIM (VF GAIN TRIM) The voltage sense inputs are optimized for the VF pin signals at 1 V and cannot sense a signal greater than 1.6 V. A resistor divider is required to divide the sensed voltage signal into a voltage of less than 1.6 V. It is recommended that the VF voltage signal be reduced to 1 V for best performance. The resistor divider introduces errors, which need to be trimmed. Use the following procedure: 1. Set the VIN_SCALE_MONITOR command in Register 0xD8 based on the resistor divider information (see Figure 22) and the turn ratio information of the transformer IN_SCALE_MONITOR = PRI SEC N N R2 R1 R2 × + where NPRI and NSEC are the turns of the primary side and secondary side windings, respectively, of the transformer. 2. Apply the nominal input voltage at the no load condition to achieve a targeted voltage of approximately 1 V at the VF pin. 3. Adjust the VF gain trim register (Register 0xFE28) when the READ_VIN reading in Register 0x88 is the exact nominal voltage reading. 4. Adjust the input voltage compensation multiplier (Register 0xFE59) to make the READ_VIN reading match the exact input voltage at full load condition. RTD AND OTP TRIM The RTD requires two trims, one for the ADC and one for the current source. To use the internal linearization scheme, addi- tional trimming procedures are required. Trimming the Current Source Register 0xFE2D[7:6] sets the value of the RTD current source to 10 µA, 20 µA, 30 µA, or 40 µA. Register 0xFE2D[5:0] can be used to fine tune the current value. By fine tuning the internal current source, component tolerance can be compensated and errors can be minimized. One LSB in Bits[5:0] = 160 nA. A decimal value of 1 adds 160 nA to the current source set by Register 0xFE2D[7:6]; a decimal value of 63 adds 63 × 160 nA = 10.08 µA to the current source set by Register 0xFE2D[7:6]. Use Register 0xFE2D[7:6] to program a value for the current source, selecting the nearest possible option (10 µA, 20 µA, 30 µA, or 40 µA). Then use Register 0xFE2D[5:0] to achieve the finer step size. For example, to use a value of 46 µA as the current source, follow these steps: 1. Place a known resistor (Rx) from the RTD pin to AGND. 2. Set Register 0xFE2D[7:6] to 11 binary (40 µA). 3. Increase the value of Register 0xFE2D[5:0], 1 LSB at a time, until the voltage at the RTD pin is VRTD = 46 µA × Rx. The current source is now calibrated and set to the factory default value. Trimming the ADC The first option for trimming the ADC uses the internal linearization scheme with 46 µA RTD current, which provides an accurate reading, expressed in degrees Celsius, read in the READ_TEMPERATURE command (Register 0x8D) in decimal format. Use an R25 = 100 kΩ, 1% accuracy NTC thermistor with beta = 4250, 1% (such as the NCP15WF104F03RC) in parallel with an external resistor of 16.5 kΩ, 1%, with the ADP1052. With this NTC thermistor and resistor combination, the ADP1052 default current source trim is set to 46 µA to achieve the best possible accuracy over temperatures ranging from 85°C to 125°C. If an external microcontroller is used, the RTD ADC value in Register 0xFEAB can be fed into the microcontroller, and a different linearization scheme can be implemented in terms of a best fit polynomial for the selected NTC characteristics. |
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