ADP1052ACPZ-R7 datasheet(37/113 Pages) AD

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Data Sheet

ADP1052

Rev. B | Page 37 of 113

Optionally, the user can process the RTD reading and use the

linearization equation to determine the overtemperature

protection setting. This allows the user to program the RTD

threshold for greater overtemperature protection accuracy.

Alternatively, when using an analog temperature sensor, such as the

STLM20, the OT_FAULT limit can still be programmed using

the OT_FAULT_LIMIT command (Register 0x4F), but a

conversion equation is needed.

Using Figure 35 as an example, assume that R1 and R2 are 20 kΩ

and 10 kΩ, respectively, and the value in Register 0x4F is

TOT_SET_LIMIT.

If TOT_SET_LIMIT < 104 decimal,

TOT_ACTUAL_LIMIT = 1.6039 × TOT_SET_LIMIT − 48.8623

If TOT_SET_LIMIT ≥ 104 decimal

TOT_ACTUAL_LIMIT = 0.801967 × TOT_SET_LIMIT + 34.5423

Table 8 shows some typical OTP threshold settings when using

an analog temperature sensor, such as the STLM20.

Table 8. Typical OT Fault Limit Settings When Using

an Analog Temperature Sensor

TOT_SET_LIMIT

OT Limit Programmed

in Register 0x4F (Decimal)

Actual OT Limit

(TOT_ACTUAL_LIMIT) (°C)

39.35

47.37

55.39

63.41

71.43

79.45

87.47

95.49

103.51

100

111.53

105

118.75

110

122.76

115

126.77

120

130.78

125

134.79

130

138.80

If the STLM20 is used, set the temperature hysteresis using

9.62°C, or 11 = 12.83°C.

VIN_ON and VIN_OFF

Two PMBus commands, VIN_ON (Register 0x35) and VIN_OFF

(Register 0x36), allow the user to set the input voltage on and off

limits independently.

The VIN_LOW flag in Register 0x7C[3] is set at initialization.

When the input voltage exceeds the VIN_ON limit, the VIN_LOW

flag clears. When the PSON signal asserts, the power conversion

starts. When the input voltage drops below the VIN_OFF limit,

the VIN_LOW flag is set and the power conversion stops. The

delay time for the power conversion start and stop can be set

separately by Register 0xFE29[3:2] and Register 0xFE29[4].

Alternatively, if the input voltage signal is not available before

startup, the VIN_ON and VIN_OFF commands can be set for

input voltage undervoltage protection using Register 0xFE29[5].

The VIN_UV_FAULT flag in Register 0x78[3], Register 0x79[3],

and Register 0x7C[4] is set if the input voltage reading falls below

the VIN_OFF limit.

The debounce time of the VIN_UV_FAULT flag setting can

be programmed at 0 ms, 2.5 ms, 10 ms, or 100 ms, using Regis-

ter 0xFE29[1:0]. Because the VIN reading is averaged every 1 ms,

there is an additional debounce time of up to 1 ms.

The response to the VIN_UV_FAULT flag is programmed via the

VIN_UV_FAULT_RESPONSE bits (Register 0xFE02[7:4]). Refer

to the Manufacturer Specific Protection Responses section and

the related register settings for details.

MANUFACTURER SPECIFIC PROTECTION

COMMANDS

CS1 Cycle-by-Cycle Current Limit

CS1 cycle-by-cycle current limit is implemented using an internal

analog comparator (see Figure 25). When the voltage at the CS1

pin (Pin 6) exceeds the threshold set by Register 0xFE1B[6], the

comparator output is triggered high and an internal flag (CS1_

OCP, which is not accessible by the user and, therefore, not listed

in the register tables) is triggered. There is a 105 ns (maximum)

propagation delay in the comparators.

A blanking time of 0 ns, 40 ns, 80 ns, 120 ns, 200 ns, 400 ns, 600 ns,

or 800 ns can be set to ignore the current spike at the beginning of

the current signal. The blanking time is set in Register 0xFE1F[6:4].

During this time, the comparator output is ignored. The blanking

time of the CS1_OCP flag can be referenced to the rising edges

of OUTA, OUTB, OUTC, and OUTD, using Register 0xFE1D[3:0].

A debounce time of 0 ns, 40 ns, 80 ns, or 120 ns can also be added

to improve the noise immunity of the CS1 OCP comparator output

circuit. The debounce time is set using Register 0xFE1F[1:0].

This is the minimum time that the CS1 signal must be constantly

above the threshold before it takes action.

Figure 40 shows an example of CS1 cycle-by-cycle current-limit

timing, with the rising edge of OUTA as the blanking time

reference. When the CS1_OCP flag is set, it does not clear until

the beginning of the next switching cycle.

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