ADP1052ACPZ-R7 datasheet(23/113 Pages) AD

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Data Sheet

ADP1052

Rev. B | Page 23 of 113

As shown in Figure 23, if the digital compensator output

remains unchanged and the VF voltage changes to 200% of its

original value (still smaller than 1.6 V), the modulation of the

OUTx edges (that are configured for modulation) is divided by 2.

Use Register 0xFE3D, Bits[3:2] to program the optional input

voltage feedforward function.

The VF pin also has a low speed, high resolution Σ-Δ ADC. The

ADC has an update rate of 800 Hz with 11-bit resolution. The

ADC output value is stored in Register 0xFEAC and converted

to the READ_VIN command (Register 0x88). This value provides

information for the input voltage monitoring and flag functions.

DIGITAL

FILTER

OUTPUT

OUTx

tMODULATION

MODULATION

Figure 23. Closed-Loop Input Voltage Feedforward Changes

Modulation Values

OPEN-LOOP INPUT, VF OPERATION

The ADP1052 can run in open-loop input voltage feedforward

operation mode. In this mode, the input voltage is sensed as the

feedforward signal for generation of the PWM outputs.

As shown in Figure 24, the digital compensator output is

modified by a programmable modulation reference.

DPWM

ENGINE

1/x

Σ-∆

ADC

READ_VIN

REG 0x88

REG 0x35,

REG 0x36

FEED-

FORWARD

ADC

0.5V TO 1.6V

0V TO 1.6V

VIN_LOW

FLAG REG 0x7C[3]

REG 0xFE29[5]

VIN_UV_FAULT

FLAG REG 0x7C[4]

FROM THE VIN

SENSE CIRCUIT

MODULATION

REFERENCE

REG 0xFE63 AND REG 0xFE64

Figure 24. Open-Loop Feedforward Operation

The VF value, which represents the input voltage, is fed into the

feedforward ADC to divide the modulation reference. The

result of this division is then fed into the PWM engine. The

duty cycle value is in inverse proportion to the input voltage.

Using the following equations:

D =

NOM

× (tREF × fSW)

and

VOUT =

VIN 

where D is the duty cycle value and VOUT is the output voltage.

The output voltage can be derived by

VOUT =





REF

NOM



where:

VIN_NOM is the nominal input voltage.

VIN is the input voltage.

tREF is the modulation reference, which is set by Register 0xFE63

and Register 0xFE64.

fSW is the switching frequency.

n is the turn ratio of the main transformer.

In the equation to derive VOUT, the input voltage, VIN, is cancelled

out. Therefore, the output voltage does not change when the

input voltage changes.

based on the target output voltage and the nominal input voltage

at which the VF pin voltage is 1 V (see Figure 24).

The PWM settings of open-loop input VF operation are similar to

those of general closed-loop operation. The falling edge timings,

rising edge timings, and modulation are set in the same manner

as for closed-loop operation, by using Register 0xFE3E to Regis-

ter 0xFE52.



modulation edges.



operation.



open-loop feedforward operation.

The flag settings of open-loop input VF operation are also similar

to those of general closed-loop operation.

Because the output voltage is not regulated in the same manner as

closed-loop operation, some settings are not functional, such as

the VOUT setting, the digital compensator settings, and the

constant current mode setting. Other settings can be programmed

in a manner that is similar to general closed-loop operation.

OPEN-LOOP OPERATION

The ADP1052 can also run in open-loop operation mode.

In this mode, the rising edges and falling edges of the PWM

outputs are fixed during normal operation. Therefore, the output

voltage varies with the input voltage. The topologies include full

bridge, half bridge, and push pull converters.

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