ADP1052ACPZ-R7 datasheet(11/113 Pages) AD

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Data Sheet

ADP1052

Rev. B | Page 11 of 113

Pin No.

Mnemonic

Description

PG/ALT

Power-Good Output (Open-Drain). Connect this pin to VDD through a pull-up resistor (typically 2.2 kΩ). This

signal is referred to AGND. This pin is also used as an SMBus ALERT signal. (For information about the SMBus

specification, see the PMBus Features section.)

VCORE

Output of the 2.6 V Regulator. Connect a decoupling capacitor of at least 330 nF from this pin to AGND, as close

as possible to the ADP1052, minimizing the printed circuit board (PCB) trace length. It is recommended that this

pin not be used as a reference or to generate other logic levels using resistive dividers.

VDD

Positive Supply Input. Voltage of 3.0 V to 3.6 V. This signal is referred to AGND. Connect a 2.2 μF decoupling

capacitor from this pin to AGND, as close as possible to the ADP1052, minimizing the PCB trace length.

AGND

Common Analog Ground. The internal analog circuitry ground and digital circuitry ground are star connected to

this pin through bonding wires.

RES

Resistor Input. This pin sets up the internal reference for the internal PLL frequency. Connect a 10 kΩ resistor

(±0.1%) from this pin to AGND. This signal is referred to AGND.

ADD

Address Select Input. This pin programs the I2C/PMBus address. Connect a resistor from ADD to AGND. This signal

is referred to AGND.

RTD

Thermistor Input. Place a thermistor (R25 = 100 kΩ (1%), beta = 4250 (1%)) in parallel with a 16.5 kΩ (1%) resistor

and a 1 nF filtering capacitor. This pin is referred to AGND. When not in use, connect this pin to AGND.

OVP

Overvoltage Protection. Use this signal for redundant overvoltage protection. This signal is referred to AGND.

Exposed Pad. The ADP1052 has an exposed thermal pad on the underside of the package. For increased

reliability of the solder joints and maximum thermal capability, it is recommended that the exposed pad be

soldered to the PCB AGND plane.

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