ADP1052ACPZ-R7 datasheet(87/113 Pages) AD

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Data Sheet

ADP1052

Rev. B | Page 87 of 113

CURRENT SENSE AND LIMIT SETTING REGISTERS

Table 126. Register 0xFE14—CS1 Gain Trim

Bits

Bit Name/Function

R/W

Description

Gain polarity

R/W

Setting this bit to 1 means that negative gain is introduced.

0 = positive gain is introduced.

1 = negative gain is introduced.

[6:0]

CS1 gain trim

R/W

This value calibrates the CS1 current sense gain. Apply 1 V dc at the CS1 pin. This register is

trimmed until the CS1 value reads 2560 decimal (0xA00).

Table 127. Register 0xFE15—CS2 Gain Trim

Bits

Bit Name/Function

R/W

Description

Gain polarity

R/W

Setting this bit to 1 means that negative gain is introduced.

0 = positive gain is introduced.

1 = negative gain is introduced

[6:0]

CS2 gain trim

R/W

This value calibrates the CS2 current sense gain.

Table 128. Register 0xFE16—CS2 Digital Offset Trim

Bits

Bit Name/Function

R/W

Description

[7:0]

CS2 digital offset trim

R/W

This register contains CS2 digital offset trim value. The value is used to calibrate the CS2 value.

The default value is the factory trim value of CS2 low-side current mode. Copy the Register 0xFB

value to this register to restore the factory trim value of CS2 high-side current sense mode.

Table 129. Register 0xFE17—CS2 Analog Trim

Bits

Bit Name/Function

R/W

Description

Reserved

R/W

Reserved.

Analog trim polarity

R/W

Setting this bit to 1 means that negative trim is introduced. Setting this bit to 0 means that

positive trim is introduced.

The default value is the factory trim value of CS2 low-side current sense mode. Copy the Register

0xFA[6] value to this bit to restore the factory trim value of CS2 high-side current sense mode.

[5:0]

CS2 analog trim

R/W

The value calibrates the CS2 analog trim.

The default value is the factory trim value of CS2 low-side current mode. Copy the Register 0xFA[5:0]

value to these bits to restore the factory trim value of CS2 high-side current mode.

Table 130. Register 0xFE19—CS2 Light Load Threshold

Bits

Bit Name/Function

R/W

Description

CS2 current sense mode

R/W

0 = CS2 current sense is configured as low-side current sense mode.

1 = CS2 current sense is configured as high-side current sense mode.

[6:5]

CS3_OC_FAULT flag

debounce

R/W

These two bits set the CS3_OC_FAULT flag debounce time.

Bit 6

Bit 5

Debounce Time (ms)

200

CS2 light load mode

enable

R/W

Setting this bit enables the light load mode function. When the CS2 current falls below the CS2

light load mode threshold, the ADP1052 operates in light load mode.

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