AD9154 datasheet(22/124 Pages) AD

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AD9154

Data Sheet

Rev. C | Page 22 of 124

SERIAL PORT OPERATION

The serial port interface (SPI) is a flexible, synchronous serial

communications port that allows easy interfacing with many

industry-standard microcontrollers and microprocessors. The

interface facilitates read/write access to all registers that configure

the AD9154. MSB first or LSB first transfer formats are supported.

The SPI is configurable as a 4-wire interface or a 3-wire interface

in which the input and output share a single-pin I/O, SDIO.

SCLK

SDIO

SDO

SPI

PORT

Figure 36. SPI Pins

There are two phases to a communication cycle with the AD9154.

Phase 1 is the instruction cycle (the writing of an instruction

byte into the device), coincident with the first 16 SCLK rising

edges. The instruction word provides the serial port controller

with information regarding the data transfer cycle, Phase 2 of

the communication cycle. The Phase 1 instruction word defines

whether the upcoming data transfer is a read or write, along

with the starting register address for the following data transfer.

A logic high on the CS pin, followed by a logic low, resets the

serial port timing to the initial state of the instruction cycle.

From this state, the next 16 rising SCLK edges represent the

instruction bits of the current input/output (I/O) operation.

The remaining SCLK edges are for Phase 2 of the communication

cycle. Phase 2 is the actual data transfer between the device and

the system controller. Phase 2 of the communication cycle is a

transfer of one or more data bytes. Eight × N SCLK cycles are

needed to transfer N bytes during the transfer cycle. Registers

change immediately upon writing to the last bit of each transfer

byte, except for the frequency tuning word (FTW) and numerically

controlled oscillator (NCO) phase offsets, which change only

when the frequency tuning word FTW_UPDATE_REQ bit is set.

DATA FORMAT

The instruction byte contains the information shown in Table 13.

Table 13. Serial Port Instruction Word

I15 (MSB)

I[14:0]

R/W

A[14:0]

R/W, Bit 15 of the instruction word, determines whether a read

or a write data transfer occurs after the instruction word write.

Logic 1 indicates a read operation, and Logic 0 indicates a write

operation.

A14 to A0, Bit 14 to Bit 0 of the instruction word, determine the

munication cycle. For multibyte transfers, A[14:0] is the starting

address. The device generates the remaining register addresses

based on the address increment bits. If the address increment

bits are set high (Register 0x000, Bit 5 and Bit 2), multibyte SPI

writes start on A[14:0] and increment by 1 every eight bits sent/

received. If the address increment bits are set to 0, the address

decrements by 1 every eight bits.

SERIAL PORT PIN DESCRIPTIONS

Serial Clock (SCLK)

The serial clock pin synchronizes data to and from the device

and runs the internal state machines. The maximum frequency

of SCLK is specified in Table 2. All data input is registered on the

rising edge of SCLK. All data is driven out on the falling edge of

SCLK.

Chip Select (CS)

An active low input starts and gates a communication cycle.

It allows the use of more than one device on the same serial

communications lines. The SDIO pin goes to a high impedance

state when this input is high. During the communication cycle,

chip select must stay low.

Serial Data I/O (SDIO)

This pin is a bidirectional data line. In 4-wire mode, this pin

acts as the data input and SDO acts as the data output.

SERIAL PORT OPTIONS

The serial port can support both MSB first and LSB first data

formats. The LSB first bits (Register 0x000, Bit 6 and Bit 1)

control this functionality. The default is MSB first (the LSB first

bits = 0).

When the LSB first bits = 0 (MSB first), the instruction and data

bits must be written from MSB to LSB. R/W is followed by A[14:0]

as the instruction word, and D[7:0] is the data-word. When the

LSB first bits = 1 (LSB first), the opposite is true. A[0:14] is

followed by R/W, which is subsequently followed by D[0:7].

The serial port supports a 3-wire or 4-wire interface. When the

SDO active bits = 1 (Register 0x000, Bit 4 and Bit 3), a 4-wire

interface with a separate input pin (SDIO) and output pin (SDO) is

used. When the SDO active bits = 0, the SDO pin is unused and

the SDIO pin is used for both input and output.

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