AD9154 datasheet(69/124 Pages) AD

поискавой системы для электроныых деталей

AD9154 датащи(PDF) 69 Page - Analog Devices

69 / 124 page

Data Sheet

AD9154

Rev. C | Page 69 of 124

Datapath PRBS IRQ

The PRBS fail signals for each DAC are available as IRQ events.

Use Register 0x020, Bits[3:0] to enable the fail signals, and then

use Register 0x024, Bits[3:0] to read back their statuses and

reset the IRQ signals. See the Interrupt Request Operation

section for more information.

DC TEST MODE

The AD9154 provides a dc test mode. When dc test mode is

activated, the input to the digital data paths is set to a midscale

DAC input dc level in place of data from the JESD204B transport

layer.

DC test mode is enabled by setting Register 0x520, Bit 1 and

clearing Register 0x146, Bit 0. Register 0x146, Bit 0 must be set

to 1 for all other modes of operation.

In dc test mode, the digital modulator can generate a sine wave

at a fixed amplitude. Digital gain, dc offset, and phase adjustment

can be applied to the sine wave on its way to each DAC core input.

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