ATtiny167-ESSZ datasheet(199/282 Pages) ATMEL

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199

7728D–AVR–07/09

ATtiny87/ATtiny167

The ADC is optimized for analog signals with an output impedance of approximately 10 k

Ω or

less. If such a source is used, the sampling time will be negligible. If a source with higher

impedance is used, the sampling time will depend on how long time the source needs to

charge the S/H capacitor, with can vary widely. The user is recommended to only use low

impedant sources with slowly varying signals, since this minimizes the required charge trans-

fer to the S/H capacitor.

Signal components higher than the Nyquist frequency (f

ADC/2) should not be present to avoid

distortion from unpredictable signal convolution. The user is advised to remove high frequency

components with a low-pass filter before applying the signals as inputs to the ADC.

Figure 17-8. Analog Input Circuitry

17.7.2

Analog Noise Canceling Techniques

Digital circuitry inside and outside the device generates EMI which might affect the accuracy of

analog measurements. If conversion accuracy is critical, the noise level can be reduced by

applying the following techniques:

Keep analog signal paths as short as possible. Make sure analog tracks run over

the analog ground plane, and keep them well away from high-speed switching

digital tracks.

Use the ADC noise canceler function to reduce induced noise from the CPU.

If any port pins are used as digital outputs, it is essential that these do not switch

while a conversion is in progress.

17.7.3

ADC Accuracy Definitions

An n-bit single-ended ADC converts a voltage linearly between GND and V

REF in 2

n steps

(LSBs). The lowest code is read as 0, and the highest code is read as 2n-1.

Several parameters describe the deviation from the ideal behavior:

• Offset: The deviation of the first transition (0x000 to 0x001) compared to the ideal transition

(at 0.5 LSB). Ideal value: 0 LSB.

ADCn

IIH

CS/H= 14 pF

VCC/2

IIL

1..100 kO

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