ATtiny167-ESSZ datasheet(26/282 Pages) ATMEL

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7728D–AVR–07/09

ATtiny87/ATtiny167

The various choices for each clocking option are given in the following sections.

When the CPU wakes up from Power-down or Power-save, or when a new clock source is

enabled by the dynamic clock switch circuit, the selected clock source is used to time the

start-up, ensuring stable oscillator operation before instruction execution starts.

When the CPU starts from reset, there is an additional delay allowing the power to reach a sta-

ble level before commencing normal operation. The Watchdog Oscillator is used for timing this

real-time part of the start-up sequence. The number of WDT Oscillator cycles used for each

time-out is shown in Table 4-2.

4.2.1

Default Clock Source

At reset, the CKSEL and SUT fuse settings are copied into the CLKSELR register. The device

will then use the clock source and the start-up timings defined by the CLKSELR bits

(CSEL3..0 and CSUT1:0).

The device is shipped with CKSEL Fuses = 0010

b, SUT Fuses = 10 b, and CKDIV8 Fuse pro-

grammed. The default clock source setting is therefore the Internal RC Oscillator running at 8

MHz with the longest start-up time and an initial system clock divided by 8. This default setting

ensures that all users can make their desired clock source setting using an In-System or

High-voltage Programmer. This set-up must be taken into account when using ISP tools.

4.2.2

Calibrated Internal RC Oscillator

By default, the Internal RC Oscillator provides an approximate 8.0 MHz clock. Though voltage

and temperature dependent, this clock can be accurately calibrated by the user. See Table

22-1 on page 245 and Section 24.7 “Internal Oscillator Speed” on page 265 for more details.

If selected, it can operate without external components. At reset, hardware loads the pre-pro-

grammed calibration value into the OSCCAL Register and thereby automatically configuring

the RC Oscillator. The accuracy of this calibration is shown as Factory calibration in Table

22-1 on page 245.

By adjusting the OSCCAL register in software, see “OSCCAL – Oscillator Calibration Regis-

ter” on page 37, it is possible to get a higher calibration accuracy than by using the factory

calibration. The accuracy of this calibration is shown as User calibration in Table 22-1 on page

245.

The Watchdog Oscillator will still be used for the Watchdog Timer and for the Reset Time-out

even when this Oscillator is used as the device clock. For more information on the pre-pro-

grammed calibration value, see the section “Calibration Byte” on page 228.

Table 4-2.

Number of Watchdog Oscillator Cycles

Typ. Time-out (Vcc = 5.0V)

Number of Cycles

4.1 ms

4.3 ms

512

65 ms

69 ms

8K (8,192)

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