ATtiny167-ESSZ datasheet(198/282 Pages) ATMEL

198 / 282 page

198

7728D–AVR–07/09

ATtiny87/ATtiny167

17.6.1

ADC Input Channels

When changing channel selections, the user should observe the following guidelines to ensure

that the correct channel is selected:

In Single Conversion mode, always select the channel before starting the conversion. The

channel selection may be changed one ADC clock cycle after writing one to ADSC. However,

the simplest method is to wait for the conversion to complete before changing the channel

selection.

In Free Running mode, always select the channel before starting the first conversion. The

channel selection may be changed one ADC clock cycle after writing one to ADSC. However,

the simplest method is to wait for the first conversion to complete, and then change the chan-

nel selection. Since the next conversion has already started automatically, the next result will

reflect the previous channel selection. Subsequent conversions will reflect the new channel

selection.

17.6.2

ADC Voltage Reference

The voltage reference for the ADC (V

REF) indicates the conversion range for the ADC. Single

ended channels that exceed V

REF will result in codes close to 0x3FF. VREF can be selected as

either AVcc, internal 1.1V / 2.56V voltage reference or external AREF pin. The first ADC con-

version result after switching voltage reference source may be inaccurate, and the user is

advised to discard this result.

17.7

ADC Noise Canceler

The ADC features a noise canceler that enables conversion during sleep mode to reduce

noise induced from the CPU core and other I/O peripherals. The noise canceler can be used

with ADC Noise Reduction and Idle mode. To make use of this feature, the following proce-

dure should be used:

Make sure that the ADC is enabled and is not busy converting. Single Conversion

mode must be selected and the ADC conversion complete interrupt must be

enabled.

Enter ADC Noise Reduction mode (or Idle mode). The ADC will start a conver-

sion once the CPU has been halted.

If no other interrupts occur before the ADC conversion completes, the ADC inter-

rupt will wake up the CPU and execute the ADC Conversion Complete interrupt

routine. If another interrupt wakes up the CPU before the ADC conversion is com-

plete, that interrupt will be executed, and an ADC Conversion Complete interrupt

request will be generated when the ADC conversion completes. The CPU will

remain in active mode until a new sleep command is executed.

Note that the ADC will not be automatically turned off when entering other sleep modes than

Idle mode and ADC Noise Reduction mode. The user is advised to write zero to ADEN before

entering such sleep modes to avoid excessive power consumption.

17.7.1

Analog Input Circuitry

The analog input circuitry for single ended channels is illustrated in Figure 17-8. An analog

source applied to ADCn is subjected to the pin capacitance and input leakage of that pin,

regardless of whether that channel is selected as input for the ADC. When the channel is

selected, the source must drive the S/H capacitor through the series resistance (combined

resistance in the input path).

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