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ATtiny167-ESSZ датащи(PDF) 77 Page - ATMEL Corporation

номер детали ATtiny167-ESSZ
подробное описание детали  8-bit Microcontroller with 8K/16K Bytes In-System Programmable Flash and LIN Controller
PDF  282 Pages
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производитель  ATMEL [ATMEL Corporation]
домашняя страница  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATtiny167-ESSZ датащи(HTML) 77 Page - ATMEL Corporation

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7728D–AVR–07/09
ATtiny87/ATtiny167
The alternate pin configuration is as follows:
• PCINT7/ADC7/AIN1/XREF/AREF – Port A, Bit7
PCINT7: Pin Change Interrupt, source 7.
ADC7: Analog to Digital Converter, channel 7.
AIN1: Analog Comparator Positive Input. This pin is directly connected to the positive input
of the Analog Comparator.
XREF: Internal Voltage Reference Output. The internal voltage reference 2.56V or 1.1V is
output when XREFEN is set and if either 2.56V or 1.1V is used as reference for ADC
conversion. When XREF output is enabled, the pin port pull-up and digital output
driver are turned off.
AREF: External Voltage Reference Input for ADC. The pin port pull-up and digital output
driver are disabled when the pin is used as an external voltage reference input for
ADC or as when the pin is only used to connect a bypass capacitor for the voltage ref-
erence of the ADC.
• PCINT6/ADC6/AIN0/SS – Port A, Bit6
PCINT6: Pin Change Interrupt, source 6.
ADC6: Analog to Digital Converter, channel 6.
AIN0: Analog Comparator Negative Input. This pin is directly connected to the negative input
of the Analog Comparator.
SS: SPI Slave Select Input. When the SPI is enabled as a slave, this pin is configured as an
input regardless of the setting of DDA6. As a slave, the SPI is activated when this pin
is driven low. When the SPI is enabled as a master, the data direction of this pin is
controlled by DDA6. When the pin is forced to be an input, the pull-up can still be con-
trolled by the PORTA6 bit.
• PCINT5/ADC5/T1/USCK/SCL/SCK – Port A, Bit5
PCINT5: Pin Change Interrupt, source 5.
ADC5: Analog to Digital Converter, channel 5.
T1: Timer/Counter1 Clock Input.
USCK: Three-wire Mode USI Clock Input.
SCL: Two-wire Mode USI Clock Input.
SCK: SPI Master Clock output, Slave Clock input pin. When the SPI is enabled as a slave,
this pin is configured as an input regardless of the setting of DDA5. When the SPI is
enabled as a master, the data direction of this pin is controlled by DDA5. When the pin
is forced to be an input, the pull-up can still be controlled by the PORTA5 bit.
• PCINT4/ADC4/ICP1/DI/SDA/MOSI – Port A, Bit 4
PCINT4: Pin Change Interrupt, source 4.
ADC4: Analog to Digital Converter, channel 4.
ICP1: Timer/Counter1 Input Capture Trigger. The PA3 pin can act as an Input Capture pin for
Timer/Counter1.
DI: Three-wire Mode USI Data Input. USI Three-wire mode does not override normal port
functions, so pin must be configure as an input for DI function.
SDA: Two-wire Mode Serial Interface (USI) Data Input / Output.
MOSI: SPI Master Output / Slave Input. When the SPI is enabled as a Slave, this pin is con-
figured as an input regardless of the setting of DDA3. When the SPI is enabled as a



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