ATtiny167-ESSZ datasheet(42/282 Pages) ATMEL

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7728D–AVR–07/09

ATtiny87/ATtiny167

Power Management and Sleep Modes

Sleep modes enable the application to shut down unused modules in the MCU, thereby saving

power. The AVR provides various sleep modes allowing the user to tailor the power consump-

tion to the application’s requirements.

When enabled, the Brown-out Detector (BOD) actively monitors the power supply voltage dur-

ing the sleep periods. To further save power, it is possible to disable the BOD in some sleep

modes. See “BOD Disable” on page 43 for more details.

5.1

Sleep Modes

Figure 4-1 on page 24 presents the different clock systems in the ATtiny87/167, and their dis-

tribution. The figure is helpful in selecting an appropriate sleep mode. Table 5-1 shows the

different sleep modes, their wake up sources and BOD disable ability.

Note:

1. For INT1 and INT0, only level interrupt.

To enter any of the four sleep modes, the SE bit in SMCR must be written to logic one and a

SLEEP instruction must be executed. The SM1, and SM0 bits in the SMCR Register select

which sleep mode (Idle, ADC Noise Reduction, Power-down, or Power-save) will be activated

by the SLEEP instruction. See Table 5-2 on page 47 for a summary.

If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU

is then halted for four cycles in addition to the start-up time, executes the interrupt routine, and

resumes execution from the instruction following SLEEP. The contents of the Register File

and SRAM are unaltered when the device wakes up from sleep. If a reset occurs during sleep

mode, the MCU wakes up and executes from the Reset Vector.

Table 5-1.

Active Clock Domains and Wake-up Sources in the Different Sleep Modes

Active Clock Domains

Oscillators

Wake-up Sources

Sleep Mode

Idle

XXXX

ADC Noise

Reduction

X(1)

XXX

Power-down

X(1)

Power-Save

X(1)

XXX

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