ATtiny167-ESSZ datasheet(11/282 Pages) ATMEL

11 / 282 page

7728D–AVR–07/09

ATtiny87/ATtiny167

Figure 2-3.

The X-, Y-, and Z-registers

In the different addressing modes these address registers have functions as fixed displace-

ment, automatic increment, and automatic decrement (see the instruction set reference for

details).

2.5

Stack Pointer

The Stack is mainly used for storing temporary data, for storing local variables and for storing

return addresses after interrupts and subroutine calls. The Stack Pointer Register always

points to the top of the Stack. Note that the Stack is implemented as growing from higher

memory locations to lower memory locations. This implies that a Stack PUSH command

decreases the Stack Pointer.

The Stack Pointer points to the data SRAM Stack area where the Subroutine and Interrupt

Stacks are located. This Stack space in the data SRAM must be defined by the program

before any subroutine calls are executed or interrupts are enabled. The Stack Pointer must be

set to point above 0x60. The Stack Pointer is decremented by one when data is pushed onto

the Stack with the PUSH instruction, and it is decremented by two when the return address is

pushed onto the Stack with subroutine call or interrupt. The Stack Pointer is incremented by

one when data is popped from the Stack with the POP instruction, and it is incremented by two

when data is popped from the Stack with return from subroutine RET or return from interrupt

RETI.

The AVR Stack Pointer is implemented as two 8-bit registers in the I/O space. The number of

bits actually used is implementation dependent. Note that the data space in some implementa-

tions of the AVR architecture is so small that only SPL is needed. In this case, the SPH

2.5.1

SPH and SPL – Stack Pointer Register

X-register

R27 (0x1B)

R26 (0x1A)

Y-register

R29 (0x1D)

R28 (0x1C)

Z-register

R31 (0x1F)

R30 (0x1E)

Bit

141312

1110

SP15

SP14

SP13

SP12

SP11

SP10

SP9

SP8

SPH

SP7

SP6

SP5

SP4

SP3

SP2

SP1

SP0

SPL

654

321

Read/Write

R/W

Initial Value

ISRAM end (See Table 3-1 on page 15)

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