ATtiny167-ESSZ datasheet(202/282 Pages) ATMEL

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7728D–AVR–07/09

ATtiny87/ATtiny167

17.8

ADC Conversion Result

After the conversion is complete (ADIF is high), the conversion result can be found in the ADC

Result Registers (ADCL, ADCH). The form of the conversion result depends on the type of the

conversion as there are three types of conversions: single ended conversion, unipolar differ-

ential conversion and bipolar differential conversion.

17.8.1

Single Ended Conversion

For single ended conversion, the result is:

where V

IN is the voltage on the selected input pin and VREF the selected voltage reference (see

Table 17-4 on page 205 and Table 17-5 on page 206). 0x000 represents analog ground, and

0x3FF represents the selected voltage reference minus one LSB. The result is presented in

one-sided form, from 0x3FF to 0x000.

17.8.2

Unipolar Differential Conversion

If differential channels and an unipolar input mode are used, the result is:

where VPOS is the voltage on the positive input pin, VNEG the voltage on the negative input pin,

and VREF the selected voltage reference (see Table 17-4 on page 205 and Table 17-5 on page

206). The voltage on the positive pin must always be larger than the voltage on the negative

pin or otherwise the voltage difference is saturated to zero. The result is presented in

one-sided form, from 0x000 (0

d) to 0x3FF (+1023d). The GAIN is either 8x or 20x.

17.8.3

Bipolar Differential Conversion

As default the ADC converter operates in the unipolar input mode, but the bipolar input mode

can be selected by writing the BIN bit in the ADCSRB register to one. In the bipolar input mode

two-sided voltage differences are allowed and thus the voltage on the negative input pin can

also be larger than the voltage on the positive input pin. If differential channels and a bipolar

input mode are used, the result is:

where VPOS is the voltage on the positive input pin, VNEG the voltage on the negative input pin,

and VREF the selected voltage reference. The result is presented in two’s complement form,

from 0x200 (-512

d) through 0x000 (+0d) to 0x1FF (+511d). The GAIN is either 8x or 20x.

ADC

VIN 1024

⋅

VREF

-----------------------------

ADC

VPOS VNEG

–

() 1024

⋅

VREF

-----------------------------------------------------------

GAIN

⋅

ADC

VPOS VNEG

–

() 512

⋅

VREF

-------------------------------------------------------

GAIN

⋅

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