ATtiny167-ESSZ datasheet(33/282 Pages) ATMEL

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7728D–AVR–07/09

ATtiny87/ATtiny167

Clock Source’ command. This will indicate via the CLKRDY bit in the CLKCSR register that a

valid clock source is available and operational.

The ‘Disable Clock Source’ command disables the clock source indicated by the settings of

CLKSELR register (only CSEL3..0). If the clock source indicated is currently the one that is

used to drive the system clock, the command is not executed.

Because the selected configuration is latched at clock source level, it is possible to enable

many clock sources at a given time (ex: the internal RC oscillator for system clock + an oscilla-

tor with external crystal). The user (code) is responsible of this management.

4.3.4

COUT Command

The ‘CKOUT ’ command allows to drive the CLKO pin. Refer to Section 4.2.7 “Clock Output

Buffer” on page 31 for using.

4.3.5

Clock Availability

‘Request for Clock Availability’ command enables a hardware oscillation cycle counter driven

by the selected source clock, CSEL3..0. The count limit value is determined by the settings of

CSUT1..0. The clock is declared ready (CLKRDY = 1) when the count limit value is reached.

The CLKRDY flag is reset when the count starts. Once set, this flag remains unchanged until a

new count is commanded. To perform this checking, the CKSEL and CSUT fields should not

be changed while the operation is running.

Note that once the new clock source is selected (‘Enable Clock Source’ command), the count

procedure is automatically started. The user (code) should wait for the setting of the CLKRDY

flag in CLKSCR register before using a newly selected clock.

At any time, the user (code) can ask for the availability of a clock source. The user (code) can

request it by writing the ‘Request for Clock Availability ’ command in the CLKSCR register. A

full polling of the status of clock sources can thus be done.

4.3.6

System Clock Source Recovering

The ‘Recover System Clock Source’ command returns the current clock source used to drive

the system clock as per Table 4-1 on page 25. The CKSEL field of CLKSELR register is then

updated with this returned value. There is no information on the SUT used or status on

CKOUT.

4.3.7

Clock Switching

To drive the system clock, the user can switch from the current clock source to any other of the

following ones (one of them being the current clock source):

Calibrated internal RC oscillator 8.0 MHz,

Internal watchdog oscillator 128 kHz,

External clock,

External low-frequency oscillator,

External Crystal/Ceramic Resonator.

The clock switching is performed by a sequence of commands. First, the user (code) must

make sure that the new clock source is operating. Then the ‘Clock Source Switching’ com-

mand can be issued. Once this command has been successfully completed using the

‘Recover System Clock Source’ command, the user (code) may stop the previous clock

source.

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