AD9549 datasheet(34/78 Pages) AD

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AD9549

Preliminary Technical Data

Rev. PrA | Page 34 of 78

1 GHz), the reference input frequency, fR (in Hz), the error

bound, E (1%=0.01), and the monitor window size (W). The

monitor window size is the difference between the maximum

and minimum number of counts accumulated between adjacent

edges of the reference input. If this window is too small,

random variations will cause the OOL detector to indicate

incorrectly that a reference is out of limits. However, the time

required to determine if the reference frequency is valid

increases with window size. A window size of at least 20 is a

good starting point.

The four input values mentioned above are used to calculate the

OOL Divider (D) and OOL nominal value (N), which in turn

are used to calculate the OOL Upper Limit (U), and OOL

Lower Limit (L) according to the following formulas:

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65535

min(

max(













ceil

)

(

)

(

floor

−

)

(

)

(

floor

ceil

The timing accuracy is dependent on two factors. The first is

the inherent accuracy of fS, since it serves as the time base for

the Reference Monitor. As such, the accuracy of the Reference

Monitor can be no better than the accuracy of fS. Second, the

value of W, which must be sufficiently large so that the timer

resolves the deviation between a nominal value of fR and a value

that is out of limits.

As an example, let fR=10MHz, Ε=1.0%, fS=1GHz, and W=20.

The limits are then:

Lower Limit = 1980

Upper Limit = 2020

Now let Ε=0.01%, Then the limits are:

Lower Limit = 199980

Upper Limit = 200020

Notice that the number of counts (and time) required to make

this measurement has increased 100x.

REFERENCE SWITCHOVER

The AD9549 supports dual input reference clocks. Reference

switchover may be accomplished either automatically or

manually by appropriately programming the "AutoRefSel" bit in

the I/O Register Map. Transition to a newly selected reference

depends on a number of factors:

State of the REFSELECT pin

State of the "Ref_AB" control register bit

State of the "Enable Ref Input Override" register bit

Holdover status

A functional diagram of the reference switchover and holdover

logic is shown in Figure 19.

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