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AD9549 датащи(PDF) 47 Page - Analog Devices

номер детали AD9549
подробное описание детали  Dual Input Network Clock Generator/Synchronizer
PDF  78 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD9549 датащи(HTML) 47 Page - Analog Devices

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Preliminary Technical Data
AD9549
Rev. PrA | Page 47 of 78
The frequency slew limiter sets a boundary on the rate of
change of the output frequency of the DDS. The frequency slew
limiting constant, KSLEW, is a 48-bit value stored in the I/O
Register Map. The value of the constant is determined by:
=
+
t
f
f
round
K
S
P
SLEW
IO
δ
δ
2
48
2
Where PIO is the value stored in the I/O Register Map for the
"P"-Divider, fS is the DAC sample rate, and δf/δt is the desired
frequency slew rate limitation. For example, suppose that
fS=1GHz, PIO=9 and δf/δt=5kHz/second, then:
() ()
721
10
5
3
10
2
2
9
9
48
=


=
+
round
K
SLEW
The resulting slew rate can be calculated as:
=
+
IO
P
S
SLEW
f
K
t
f
48
2
2
δ
δ
The above example yields: δf/δt=5.003kHz/s
FREQUENCY ESTIMATOR
The AD9549 has a frequency estimation function that will
automatically set the DDS output frequency so that the
feedback frequency (fDDS/S) and the prescaled reference
frequency (fREF_IN/R) are matched within an error tolerance (ε0).
It’s primary purpose is to allow the PLL to quickly lock when
the reference frequency is not known. The error tolerance is
defined as a fractional error and is controlled by a 16-bit
programmable value (K) via the I/O Register Map.
The precision of any frequency measurement is dependent on
two factors:
the timing resolution of the measurement device (δt)
the duration of the measurement (Tmeas)
The frequency estimator uses fS as its measurement reference, so
δt=1/f
S
(i.e., δt=1ns for a 1GHz DAC sample rate). The
duration of the measurement is controlled by K, which
establishes a measurement interval that is K cycles of the
measured signal such that Tmeas=KR/fREF_IN.
The frequency estimator uses a 17-bit counter to accumulate
the number δt periods within the measurement interval. The
finite capacity of the counter puts an upper limit on the
duration of the measurement, which is constrained to
Tmax=217/fS. If fS=1GHz, then this equates to ~131µs. The fact
that the measurement time is bounded by Tmax means there is a
limit to the largest value of K (KMAX) that can be used without
causing the counter to overflow. The value of KMAX is given by:
( )
ρ
65535
floor
K
MAX =
where
R
S
f
R
f
=
ρ
R is the modulus of the feedforward divider and fR is the input
reference frequency.
The measurement error (ε) associated with the frequency
estimator depends on the choice of the measurement interval
parameter (K). These are related by:
()
1
1
=
K
floor
K
ρ
ρ
ε
With a specified fractional error (ε0), only those values of K for
which ε ≤ ε0 result in a frequency estimate that meets the
requirements. A plot of ε versus K (for a given ρ) takes on the
general form shown below.
ε
K
1
0
1
216
ε bounded
by envelope
ε
0
K
0
K
1
K
HI
K
LO
ε < ε
0 for all K > K1
ε > ε
0 for all K < K0
ε < ε
0 for some K
(K
0 < K < K1)
Figure 34: Frequency Estimator
ε vs. K
An iterative technique is necessary to determine the exact
values of K0 and K1. However, a closed form exists for a
conservative estimate of K0 (KLO) and K1 (KHI):
( )
[
]
0
1
1
1
ε
ρ
+
= ceil
K
LO
( )
[
]
0
1
2
1
ε
ρ
+
= ceil
K
HI



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