AD9549 datasheet(35/78 Pages) AD

35 / 78 page

Preliminary Technical Data

AD9549

Rev. PrA | Page 35 of 78

State

Machine

REF SEL

Derived RefSel State

Derived Holdover State

HOLDOVER

AutoHold

AutoRefSel

Override RefPin

RefAB

Override HldPin

Hldovr

Active RefSel State

Active Holdover State

Reference

Switching

Control

Logic

Holdover

Control

Logic

Figure 19: Reference Switchover and Holdover Logic

In manual mode, the active reference is determined by an

externally applied logic level to the REFSELECT pin. In

automatic mode, an internal state machine determines which

reference is active, and the REFSELECT pin becomes an output

indicating which reference the state machine is using.

The user may override the active reference chosen by the

internal state machine via the "Enable Ref Input Override " bit

in the I/O Register Map. The "Ref_AB" bit in the I/O Register

Map is then used to select the desired reference. When in

override, it is important to note that the REFSELECT pin does

not indicate the physical reference selected by the "Ref_AB" bit.

Instead, it indicates the reference that the internal state machine

would select if the device were not in the override mode. This

allows the user to force a reference switchover by means of the

programming registers while monitoring the response of the

state machine via the REFSELECT pin.

The same type of operation (manual/automatic and override)

also applies to the holdover function, as shown in the Reference

Switchover Logic diagram. The dashed arrows in the diagram

indicate that the state machine output is available to the

REFSELECT and HOLDOVER pins when in override mode.

Use of Line Card Mode to Eliminate Runt Pulses

When two references are not in exact phase alignment and a

transition is made from one to the other, it is possible that an

extra pulse can be generated. This depends on the relative edge

placement of the two references and the point in time that a

switch over is initiated. To eliminate the "extra pulse" problem,

an "Enable Line Card Mode" bit is provided in the I/O Register

map. The Line Card Mode logic is shown in Figure 20 below.

When Enable Line Card bit is 0, reference switch over occurs on

command without consideration to the relative edge placement

of the references. This means that there is the possibility of an

extra pulse. However, when this bit is set to 1, the timing of the

reference switch over is executed conditionally as shown in

Figure 21 on Page 36.

From

Reference

Selection

Logic

REFA In

REFB In

REF In

selected reference

Enable

Line-Card

Mode

Figure 20: Reference Switchover Control Logic

Note that when the line card mode is enabled, the rising edges

of the alternate reference are used to clock a latch. The latch

holds off the actual transition until the next rising edge of the

alternate reference.

Shown in Figure 21 is a timing diagram that demonstrates the

difference between reference switchover with the line card

mode enabled and disabled. If enabled, when the reference

switchover logic is given the command to switch to the alternate

reference, an actual transition does not occur until the next

rising edge of the alternate reference. This action eliminates the

spurious pulse that can occur when the line card mode is

disabled.

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