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AD9549 датащи(PDF) 28 Page - Analog Devices

номер детали AD9549
подробное описание детали  Dual Input Network Clock Generator/Synchronizer
PDF  78 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD9549 датащи(HTML) 28 Page - Analog Devices

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AD9549
Preliminary Technical Data
Rev. PrA | Page 28 of 78
The phase gain of the fine phase detector is controlled by an 8-
bit scale factor (FPFD_Gain) in the I/O Register Map. The
nominal (default) value of FPFD_Gain is 200, and establishes
the phase gain as:
(
)()
R
f
Gain
FPFD
R
FPD
PhaseGain
_
10
2
7
10
=
Phase Detector Gain Matching
Although the fine and coarse phase detectors use different
means to make a timing measurement, it is essential that both
have equivalent phase gain. Without proper gain matching the
closed-loop dynamics of the system cannot be properly
controlled. Hence, the goal is to make PhaseGainCPD=
PhaseGainFPD. This leads to:
(
)
(
)
Gain
FPFD
PDG
f
PDS
S
_
10
2
2
7
10
6
=
+
Which simplifies to:
(
)
S
f
Gain
FPFD
PDS PDG
_
10
16
7
2
=
Typically, FPFD_Gain is established first and then PDG and
PDS are calculated. The proper choice for PDS is given by:
(
)
[
]
S
f
Gain
FPFD
round
PDS
2
_
10
2
7
log
=
The final value of PDS must satisfy 0 ≤ PDS ≤ 7. The proper
choice for PDG is calculated using this equation:
(
)
S
PDS
f
Gain
FPFD
round
PDG
4
7
2
_
10
=
The final value of PDG must satisfy 0 ≤ PDG ≤ 63. For
example, let fS=700MHz and FPFD_Gain=200, then PDS=1 and
PDG=23.
Note that the AD9549 Evaluation Software will calculate
register values that have the phase detector gains already
matched.
Phase Detector Pin Connections
There are three pins associated with the phase detector that
must be connected to external components. The diagram below
shows the recommended component values and their
connections.
PFD_VRB
PFD_VRT
PFD_RSET
20
21
22
0.1
µF
10
µF
0.1
µF0.1µF
AD9549
Figure 13: Phase Detector Pin Connections
DIGITAL LOOP FILTER COEFFICIENTS
In order to provide the desired flexibility, the loop filter has
been designed with three programmable coefficients (α, β and
γ). The coefficients along with P (where P=2Pio) completely
defines the response of the filter, which is given by:
(
)
)
1
(
)
2
(
)
1
(
2
)
(
+
+
+
+
=
γ
γ
γ
β
ω
ω
ω
α
ω
j
j
j
e
e
e
LoopFilter
H
To evaluate the response in terms of absolute frequency
substitute:
S
f
Pf
π
ω 2
=
Where P is the divide ratio of the "P"-divider, fS is the DAC
sample rate, and f is the frequency at which the function is to be
evaluated.



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