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MSP430 датащи(PDF) 64 Page - Texas Instruments |
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MSP430 датащи(HTML) 64 Page - Texas Instruments |
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64 / 88 page ![]() 7.6.1.20 GEN_STATUS_MASK Register (Offset = 1Eh) [Reset = FFFFh] Return to the Register Map. Table 7-31. GEN_STATUS_MASK Register Field Descriptions Bit Field Type Reset Description 15-8 RESERVED R FFh 7 SR_BUSYn R/W 1h Slew Rate Not Busy Mask 0h = Fault asserts IRQ 1h = The mask prevents IRQ or Alarm being triggered (default). The status is always set if the condition exists. 6 ADC_EOC R/W 1h ADC End Of Conversion Mask Same as Slew Rate Not Busy Mask (default 1h). 5-4 RESERVED R 3h 3 BREAK_FRAME_ERR R/W 1h Break Frame Error Fault Mask Same as Slew Rate Not Busy Mask (default 1h). 2 BREAK_PARITY_ERR R/W 1h Break Parity Error Fault Mask Same as Slew Rate Not Busy Mask (default 1h). 1 UART_FRAME_ERR R/W 1h UART Frame Error Fault Mask Same as Slew Rate Not Busy Mask (default 1h). 0 UART_PARITY_ERR R/W 1h UART Parity Error Fault Mask Same as Slew Rate Not Busy Mask (default 1h). AFE78101, AFE88101 SLASF21 – DECEMBER 2022 www.ti.com 64 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: AFE78101 AFE88101 |
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