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MSP430 датащи(PDF) 32 Page - Texas Instruments

номер детали MSP430
подробное описание детали  AFEx8101 16-Bit and 14-Bit, Low-Power DACs With Voltage Reference and Diagnostic ADC for 4-mA to 20-mA Loop-Powered Applications
PDF  88 Pages
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
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MSP430 датащи(HTML) 32 Page - Texas Instruments

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7.3.2.2 ADC Custom Channel Sequencer
The device uses a custom channel sequencer to control the multiplexer of the ADC. The ADC sequencer
allows the user to specify which channels are converted. The sequencer consists of 16 indexed slots with
programmable start and stop index fields to configure the start and stop conversion points.
In direct-mode conversion, the ADC converts from the start index to the stop index once and then stops. In
auto-mode conversion, the ADC converts from the start to stop index repeatedly until the ADC is stopped. Figure
7-9 shows the indexed custom channel sequence slots available in the device.
ADC
OFFSET
AIN0
AIN1
TEMP
SD MUX
GND
GND
VREF
PVDD
VDD
ZTAT
VOUT
0
1
2
3
4 - 8
9
15
4
5
6
7
8
ADC_INDEX_CFG.START
ADC_INDEX_CFG.STOP
Register 09h
Custom Channel
Sequencer (CCS) Pointer
Self Diagnostic
Multiplexer (SD MUX)
Figure 7-9. ADC MUX Control
Table 7-5 lists the ADC input channel assignments for the sequencer.
Table 7-5. Indexed Custom Channel Sequence
CCS POINTER
CHANNEL
CONV_RATE
RANGE
0
OFFSET
2560 Hz
VREF
1
AIN0
Programmable
Programmable
2
AIN1
Programmable
Programmable
3
TEMP
2560 Hz
VREF
4
SD0 (VREF)
2560 Hz
VREF
5
SD1 (PVDD)
2560 Hz
VREF
6
SD2 (VDD)
2560 Hz
VREF
7
SD3 (ZTAT)
2560 Hz
VREF
8
SD4 (VOUT)
2560 Hz
VREF when PVDD = 1.8 V
2 × VREF when PVDD ≥ 2.7 V
9-15
GND
2560 Hz
VREF
Use the ADC_INDEX_CFG register to select the channels. The order of the channels is fixed and shown in
Table 7-5. Then, use ADC_INDEX_CFG.START and ADC_INDEX_CFG.STOP to select the range of indices
to convert. If these two values are the same, then the ADC only converts a single channel. If the START and
STOP values are different, then the ADC cycles through the corresponding indices. By default, all channels are
configured to be converted; START = 0 and STOP = 8. If the AIN1 channel is not configured as an ADC input,
then the result for this channel is 0x000. The minimum time for a conversion is still allotted to AIN1 if the channel
is within the START and STOP range. If START is configured to be greater than STOP, then the device interprets
the conversion sequence as if START = STOP.
In direct mode, each selected channel in the ADC_INDEX_CFG register is converted once per TRIGGER.ADC
command. In auto mode, each channel selected in the ADC_INDEX_CFG register is converted once; after the
last channel, the loop is repeated as long as the ADC is enabled. In auto mode, writing to TRIGGER.ADC = 1
starts the conversions. Writing TRIGGER.ADC = 0 disables the ADC after the current channel being converted
finishes. In direct mode, writing TRIGGER.ADC = 1 starts the sequence. When the sequence ends, then
TRIGGER.ADC is self-cleared.
AFE78101, AFE88101
SLASF21 – DECEMBER 2022
www.ti.com
32
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Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: AFE78101 AFE88101



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