CS4210 datasheet(78/102 Pages) NSC

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4.4.22 Asynchronous Request Filter Registers

The CS4210 allows for selective access to host memory

and the Asynchronous Receive Request context so that

software can maintain host memory integrity. The selective

access is provided by two sets of registers: PhysRequest-

Filter and AsyncRequestFilter. These registers allow

access to physical memory and the AR Request context on

a nodeID basis. The request filters are not applied to qua-

dlet read requests directed at the Config ROM (including

the ConfigROM header, BusID, Bus Options, and Global

Unique ID registers) nor to accesses directed to the isoch-

ronous resource management registers. When the link is

enabled, access by any node to the first 1K of CSR config

ROM is enabled (see Section 4.4.5 "Configuration ROM

Header Register" on page 61). The Asynchronous Request

Filters do not have any effect on Asynchronous Response

packets. When a request is received by the CS4210 from

the 1394 bus and that request does not access the first 1K

of CSR config ROM on the CS4210, then the sourceID is

used to index into the AsyncRequestFilter. If the corre-

sponding bit in the AsyncRequestFilter is set to 0, then

requests from that device are not enabled; there is no ack_

sent, and the requests are ignored by the CS4210. If, how-

ever, the bit is set to 1, the requests are accepted and pro-

cessed according to the address of the request and the

setting of the PhysicalRequestFilter register (BAR0+Offset

110h, see Section 4.4.23 "Physical Request Filter Regis-

ters"

page

79).

Requests

offsets

above

0000_FFFF_FFFFh, with the exception of offsets handled

physically as described in Section 3.6 "Physical Requests"

on page 26, are always sent to the Asynchronous Request

Receive DMA context. If the AR Request DMA context is

not enabled, then the CS4210 ignores the request. These

registers are set and clear. If bit asyncReqResourceN is

set, then requests with a sourceID of either {3FFh, #N} or

{busID, #N} are accepted. If the asyncReqResourceAll bit

is set in AsyncRequestFilterHi, requests from all bus nodes

including those on the local bus are accepted. Reading the

AsyncRequestFilter registers returns their current state. All

asyncReqResourceN bits in the AsyncRequestFilter regis-

terare clearedto0 on a1394 bus reset.

Table 4-37. BAR0+Offset 100h (Set) and 104h (Clear): AsyncRequestFilterHi Register

Bit

Name

Access

Reset

Description

asyncReqRe-

sourceAll

RSCU

Asynchronous Requests Resource All: If set to one, all asynchronous

requests received by the CS4210 from all bus nodes (including the local

bus) are accepted, and the values of all asyncReqResourceN bits are

ignored. A bus reset does not affect the value of the asyncReqResourceAll

bit.

30:0

asyncReqRe-

sourceN

RSCU

00h

Asynchronous Requests Resource [62:32]: If set to one for local bus

node number N, asynchronous requests received by the CS4210 from that

node are accepted. All asyncReqResourceN bits are cleared to zero when

a bus reset occurs.

Table 4-38. BAR0+Offset 108h (Set) and 10Ch (Clear): AsyncRequestFilterLo Register

Bit

Name

Access

Reset

Description

31:0

asyncReqRe-

sourceN

RSCU

00h

Asynchronous Requests Resource [31:0]: If set to one for local bus node

number N, asynchronous requests received by the CS4210 from that node

are accepted. All asyncReqResourceN bits are cleared to zero when a bus

reset occurs.

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