CS4210 datasheet(64/102 Pages) NSC

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4.4.10 PostedWriteAddress Register

The PostedWriteAddress register (Table 4-19) is a 64-bit

number which indicates the bus and node numbers (source

ID) of the node that issued the write that failed, and the

address that node attempted to access. The Posted-

WriteAddress is contained in two 32-bit registers, Posted-

WriteAddressHi

and

PostedWriteAddressLo.

The

IntEvent.PostedWriteErr bit (BAR0+Offset 80h[8]) allows

hardware to generate an interrupt when a write fails.

The PostedWriteAddress register points to a queue in the

CS4210. This queue is accessed by software through the

PostedWriteAddress register. When a posted write fails, its

address and node’s source ID are placed in this queue,

and the interrupt is generated. In addition, that packet is

removed from the FIFO. By removing the packet from the

FIFO, the CS4210 is not blocked from performing future

transactions on the 1394 and host buses. When software

reads from these registers, that entry is removed from the

queue, the next address and source ID are placed at the

head of the queue, and another interrupt is generated.

When the queue is empty, the CS4210 stops generating

interrupts. In order to guarantee the accuracy of the Posted

Write error registers, software must perform the following

algorithm when the posted write error interrupt is encoun-

tered:

Read the PostedWriteAddressHi.offsetHi field.

Read the PostedWriteAddressLo.offsetLo field.

Clear the IntEvent.PostedWriteError bit (BAR0+Offset

80h[8]).

This guarantees that software receives all information it

requires about the first posted write, allowing another inter-

rupt to be generated for future posted writes, and simplifies

the CS4210 hardware. The CS4210 does not monitor that

all three events occur before it moves to the next item in the

queue. It considers the information read once it sees the

IntEvent.PostedWriteError

bit

(BAR0+Offset

80h[8])

cleared to 0.

4.4.11 Vendor ID Register

The Vendor ID register holds the company ID of National

Semiconductor Corporation indicating that additional regis-

ters have been specified in the CS4210.

Table 4-19. PostedWriteAddress Register

Bit

Name

Access

Reset

Description

BAR0+Offset 38h

PostedWriteAddressLo Register

31:0

offsetLo

Undef

Offset Low: The low 32-bits of the 1394 destination offset of the write

request that failed.

BAR0+Offset 3Ch

PostedWriteAddressHi Register

31:16

sourceID

Undef

Source ID: The busNumber and nodeNumber of the node that issued the

write request that failed.

15:0

offsetHi

Undef

Offset High: The upper 16-bits of the 1394 destination offset of the write

request that failed.

Table 4-20. BAR0+Offset 40h: Vendor ID Register

Bit

Name

Access

Reset

Description

31:24

vendorUnique

Vendor Unique: 0h

23:0

vendorCompanyID

80017h

Vendor Company Identification: The company ID National Semiconduc-

tor Corporation of 80017h.

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