VSC7440 datasheet(82/444 Pages) MICROSEMI

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Functional Descriptions

VMDS-10492 VSC7440 Datasheet Revision 4.2

The following table shows the distribution of entry and action bits in the VCAP ES0.

The VCAP ES0 has 11 default rules. The address of default rule number n is (512 + n). When submitting

a key to the VCAP ES0, the rewriter simultaneously decides which default rule to hit if the key does not

match any entries in the VCAP.

3.12.4

VCAP Programming Examples

This section provides examples of programming VCAP CLM and VCAP ES0.

3.12.4.1 Writing a Wide CLM Rule

This example shows how to write a CLM X4 rule, consisting of an X2 TRI_VID entry and an X4 FULL

action, to the CLM1 VCAP. In this example, the second and third blocks of VCAP resources have already

been mapped to CLM1.

When the second and third resource blocks are mapped to CLM1, it then owns VCAP address range

1024-3071. An X4 rule must be placed on an address inside memory owned by CLM1 and starting

addresses must be divisible by four, because it is an X4 rule. In this example, the X4 rule is written to

addresses 1412-1415.

Software is expected to track memory usage so that it only writes to VCAP memory that does not already

contain active rules. Deleting of rules is done by initializing the associated addresses.

The X2 TRI_VID entry is 69 bits wide. The X4 FULL action is 250 bits wide. For information about how to

build a FULL action, see VCAP CLM Actions, page 92. For information about how to build a TRI_VID

entry, see VCAP CLM X2 Key Details, page 75.

Each address holds 36 bits of entry data/mask, but some of them are used for type-group fields. For

more information about TRI_VID’s entry type-group field and entry bit-ranges for address offset 0 and 1,

Table 41, page 60 and Table 43, page 61. The results are shown in the following table.

Note: The TRI_VID entry completely fills available entry space. If it had been less than 69 bits wide, then MSBs

at address offset 1 would have been treated as Match-0.

Each address holds 70 bits of action, but some of them are used for type-group fields. For more

information the FULL’s action type-group field and the action bit ranges for all four address offsets, see

Table 42, page 60 and Table 43, page 61. The results are shown in the following table.

The FULL action is only 250 bits wide, so bits [272:250] of address offset 3 must be treated as zeros.

Table 52 •

VCAP ES0 Entry/Action Bit Distribution

Address Offset

e[29:0], a[284:0]

Table 53 •

CLM X2 Entry Type-Group and Distribution Summary

Address

Type-Group Field

Entry Data/Mask Range

1412

0b10

[33:0]

1413

0b0

[68:34]

Table 54 •

CLM X4 Action Type-Group and Distribution Summary

Address

Type-Group Field

Action Data/Mask Range

1412

0b100

[66:0]

1413

0b0

[135:67]

1414

0b00

[203:136]

1415

0b0

[249:204]

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