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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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VSC7440 датащи(PDF) 24 Page - Microsemi Corporation |
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VSC7440 датащи(HTML) 24 Page - Microsemi Corporation |
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24 / 444 page  Functional Descriptions VMDS-10492 VSC7440 Datasheet Revision 4.2 7 Figure 2 • Block Diagram 3.2.1 Frame Arrival in Ports and Port Modules The Ethernet interfaces receive incoming frames and forward these to the port modules. Two ports are dual media ports supporting either a 1G copper PHY or a 1G SGMII SerDes macro. The remaining ports all support SerDes macros. Each port contains a Media Access Controller (MAC) that performs a full suite of checks, such as VLAN tag-aware frame size checking, frame check sequence (FCS) checking, and pause frame identification. SerDes ports contain a Physical Coding Sublayer (PCS), which performs 8b/10b or 64b/66b encoding, auto-negotiation of link speed and duplex mode, and monitoring of the link status. Symmetric and asymmetric pause flow control are both supported as well as priority-based flow control (IEEE 802.1Qbb). Analyzer Ingress Processing Rewriter Egress Processing Shared Memory Pool Memory Controller Hierarchical QoS Shaper and Scheduler SerDes1G Lane GPIO nRESET DDR DDR3/DDR3L Memory Controller GPIO functions: LED, serial GPIO, UART, two-wire serial interface, IRQ, MIIM, LOS, SyncE, 1588, RefClk JTAG SerDes6/10G Lane Discard Statistics Shared Queue System Automated Frame Injection (AFI) Dual Media 1G Port Modules MAC, PCS 1588/OAM Timestamping x2 Frame bus 2.5G Port Modules MAC, PCS 1588/OAM Timestamping x4 VCore Arbiter VCore CPU Bus Switch Core Registers VCore SBA Access Block Temperature Sensor Interrupt Controller Timers Switch Core Access Block SI Slave Frame DMA (FDMA) Manual Frame Inject/Extract MIIM Slave EJTAG MIPS 24KEc MMU I-Cache 32 kB D-Cache 32 kB VRAP Ethernet Register Access 1G SGMII 100BASE-FX 2.5G SGMII 1G SGMII 100BASE-FX Port L2CP Handling Ingress Classification (VLAN and QoS Mapping) Access Control Lists Policing (Port, QoS, ACL) Arrival Stats Forwarding L2/L3 IEEE1588 Engine Departure Stats Egress VCAP Lookup IEEE1588 Engine Frame Editing: VLAN tags DSCP IEEE1588 L2/L3/L4 Protection Switching PCIE PCIe JTAG SI SI 37 1G CuPHY 1000BASE-T x2 x3 x4 SerDes1G Lane 1G Port Modules MAC, PCS 1588/OAM Timestamping x3 x2 1G SGMII 100BASE-FX SerDes10G Lane 10G Port Modules MAC, PCS 1588/OAM Timestamping x2 10G SFI 2.5G SGMII 1G SGMII 100BASE-FX x2 |
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