VSC7440 datasheet(71/444 Pages) MICROSEMI

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Functional Descriptions

VMDS-10492 VSC7440 Datasheet Revision 4.2

The statistic counters start counting as soon as the hardware has reset

ASM::STAT_CFG.STAT_CNT_CLR_SHOT to 0.

For information about the lists of port statistics registers available per port, see ASM:DEV_STATISTICS

For the 10G capable ports, set ASM::PORT_CFG.CSC_STAT_DIS to 1 when the port is set up for

speeds faster than 2.5G, because the collection of statistics are handled locally in the DEV10G. For lower

speeds, the port uses a DEV2G5.

All statistic counters have a width of 32 bits, except for the five byte-counters; RX_IN_BYTES_CNT,

RX_OK_BYTES_CNT, RX_BAD_BYTES_CNT, TX_OUT_BYTES_CNT, and TX_OK_BYTES_CNT.

Those have an additional 4-bit MSB counter. When reading from counters with more than 32 bits, the

non-MSB part has to be read first in order to latch the MSB part into a shadow register, where the value

can be read afterward. For writing, the MSB part must be written first.

3.11.6

Setting Up the Loopback Path

Cells to be looped back by the assembler are received on a separate loopback cell bus interface from the

rewriter. The assembler merges the loopback data with data received from the ports onto the outgoing

cell bus towards the analyzer. Loopback data belongs to one of the three following types.

•

Virtual device 0 (VD0)

•

Virtual device 1 (VD1)

•

Front port loopback (LBK)

Each of the three loopback traffic types has its own FIFO. VD0 is accessed at register replication 0, VD1

at register replication 1, and LBK at register replication 2. The following table lists the loopback

configuration registers.

A FIFO can be flushed using the ASM::LBK_FIFO_CFG.FIFO_FLUSH register. The register field clears

itself when the flush is completed.

Cells in the FIFO can be discarded due to aging. If a frame is discarded due to aging, a per port sticky bit

is set in ASM::LBK_AGING_STICKY. The following table lists the loopback FIFO sticky bit registers.

For VD0 and VD1, the loopback block pushes back towards the queue system to avoid FIFO overflows.

The watermark for configuring the FIFO level at which push back is active can be set in

ASM::VD_FC_WM.VD_FC_WM. The watermark can be configured individually for VD0 and VD1.

No flow control handling exists for the LBK FIFO. In case of overflow, all new cells received from the

rewriter are discarded, and a bit in the ASM::LBK_OVFLW_STICKY.LBK_OVFLW_STICKY sticky-bit

Table 36 •

Loopback FIFO Configuration Register Overview

Target::Register.Field

Description

Replication

ASM::LBK_FIFO_CFG.FIFO_FLUSH

Flush all data in the FIFO.

Per FIFO

ASM::VD_FC_WM.VD_FC_WM

Watermark for flow control towards the

queue system.

Per VD FIFO

Table 37 •

Loopback FIFO Sticky-Bit Registers Overview

Target::Register.Field

Description

Replication

ASM::LBK_AGING_STICKY.LBK_AGING_

STICKY

Set if a frame has been discarded due to

aging. Per port bitmask.

ASM::LBK_OVFLW_STICKY.LBK_OVFLW

_STICKY

Set if a frame have been discarded due

to overflow.

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