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Functional Descriptions

VMDS-10492 VSC7440 Datasheet Revision 4.2

3.12

Versatile Content-Aware Processor (VCAP)

The Versatile Content-Aware Processor (VCAP™) is a content-aware packet processor that allows wire-

speed packet inspection for rich implementation of, for example, advanced VLAN and QoS classification

and manipulations, IP source guarding, and security features for wireline and wireless applications. This

is achieved by programming rules into the VCAP.

When a VCAP is enabled, every frame passing though the switch is analyzed and multiple keys are

created based on the contents of the packet. The frame is examined to determine the frame type (for

example, IPv4 TCP frame), so that the frame information is extracted according to the frame type, port-

specific configuration, and classification results from the basic classification. Keys are applied to the

VCAP and when there is a match between a key and a rule in the VCAP, the rule is then applied to the

packet from which the key was extracted.

A rule consists of an entry, an action, and a counter. Keys are matched against the entry of a rule. When

a rule is matched, the action is returned by the VCAP, and the rule’s counter is incremented.

One and only one rule will match a key. If a key matches more than one rule, the rule at the highest

address is selected. This means that a rule at high address takes priority over rules at lower addresses.

When a key does not match a rule, a default rule is triggered. A default rule’s action is programmable just

like regular rules. Some VCAPs have more than one default rule; which default rule to use is determined

at the same time as the key is created and applied to the VCAP.

This section provides information about entries and actions in general terms. When discussing an entry

or an action, it is considered a vector of bits that is provided by software. For information about building

classification matching (CLM) keys, see VCAP CLM Keys and Actions, page 71. For information about

building ingress stage 2 (IS2) keys, see VCAP IS2 Keys and Actions, page 150. For information about

building longest prefix matching (LPM) keys, see VCAP LPM: Keys and Action, page 131. For

information about building egress stage 0 (ES0) keys, see VCAP_ES0 Lookup, page 247.

The following sections describe how to program rules into the VCAPs of the device. First, a general

description of configuration and VCAP operations is provided, including a description of wide VCAP

rules. Second, detailed information about individual VCAPs is provided. Finally, a few practical examples

illustrate how everything fits together when programming rules into VCAPs.

3.12.1

Configuring VCAP

Registers are available in two targets: VCAP_ES0 and VCAP_SUPER. Use VCAP_ES0 to configure the

VCAP ES0 target and the VCAP_SUPER target for all other VCAPs.

The following table lists the registers associated with VCAP_ES0 and VCAP_SUPER.

A rule in the VCAP consists of an entry, action, and counter showing if the entry was hit. Rules are

accessed indirectly though a cache. The cache corresponds to one address in VCAP memory. Software

Table 38 •

VCAP_ES0 and VCAP_SUPER Registers

Description

VCAP_UPDATE_CTRL

Initiates of read/write/move/initialization operations

VCAP_MV_CFG

Configures move/initialization operations

VCAP_CORE_IDX

Resource allocation, core index (does not apply to ES0)

VCAP_CORE_MAP

Resource allocation, mapping of cores (does not apply to ES0)

VCAP_ENTRY_DAT

Cache: Entry data

VCAP_MASK_DAT

Cache: Entry mask

VCAP_ACTION_DAT

Cache: Action

VCAP_CNT_DAT

Cache: Sticky-counter

VCAP_RULE_ENA

Cache: Rule enable (only applies to ES0)

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