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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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VSC7440 датащи(PDF) 60 Page - Microsemi Corporation |
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VSC7440 датащи(HTML) 60 Page - Microsemi Corporation |
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60 / 444 page  Functional Descriptions VMDS-10492 VSC7440 Datasheet Revision 4.2 43 • Far-End Fault facility: In 100BASE-FX, the PCS supports the optional Far-End Fault facility. Both Far-End Fault Generation (PCS_FX100_CFG.FEFGEN_ENA) and Far-End Fault Detection (PCS_FX100_CFG.FEFCHK_ENA) are supported. A Far-End Fault incident is recorded in PCS_FX100_STATUS.FEF_FOUND. • Signal Detect: 100BASE-FX has a similar signal detect scheme as of the SGMII and SERDES modes. For 100BASE-FX, PCS_FX100_CFG.SD_ENA enables signal detect, and PCS_FX100_CFG.SD_SEL selects the input source. The current status of the signal detect input can be observed through PCS_FX100_STATUS.SIGNAL_DETECT. For more information about signal detect, see Signal Detect, page 41. • Link Surveillance: The PCS synchronization status can be observed through PCS_FX100_STATUS.SYNC_STATUS. When synchronization is lost the link breaks and PCS_FX100_STATUS.SYNC_LOST_STICKY is set. The PCS continuously tries to recover the link. • Unidirectional mode: 100BASE-FX has a similar unidirectional mode as for the SGMII and SerDes modes, enabled through PCS_FX100_CFG.UNIDIR_MODE_ENA. 3.9.4 Port Statistics Port statistics for DEV1G and DEV2G5 port modules are collected in the assembler and is accessed through registers in the assembler. 3.10 DEV10G Port Module The DEV10G port module can be used in the full-duplex operation mode listed in the following table. 3.10.1 MAC This section describes the high level functions and the configuration options of the Media Access Controller (MAC) that is used in the DEV10G port modules. The following table lists the registers associated with configuring the DEV10G MAC. Table 17 • DEV10G Operation Mode Mode Lane Speed (Gbps) Lanes Encoding PCS Used IPG Shrink (Avg) Preamble Shrink Data Bandwidth Payload Bandwidth Comment SFI 10.3125 1 64b/66b PCS SFI No No 10 Gbps 10 Gbps Standard SFI Table 18 • DEV10G MAC Configuration Registers Overview Register Description Replication MAC_ENA_CFG Enables of Rx and Tx data paths Per port MAC_MODE_CFG Port mode configuration Per port MAC_MAXLEN_CFG Maximum length configuration Per port MAC_NUM_TAGS_CFG Number of tags configuration Per port MAC_TAGS_CFG VLAN/service tag configuration Three per port MAC_ADV_CHK_CFG Advance Check Feature configuration Per port MAC_LFS_CFG Link Fault Signaling configuration Per port MAC_LB_CFG Loopback configuration Per port MAC_STICKY Sticky bit recordings Per port |
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