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VSC7440 датащи(PDF) 23 Page - Microsemi Corporation

номер детали VSC7440
подробное описание детали  L2/L3 Enterprise Gigabit Ethernet Switch with 10 Gbps Links
PDF  444 Pages
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производитель  MICROSEMI [Microsemi Corporation]
домашняя страница  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

VSC7440 датащи(HTML) 23 Page - Microsemi Corporation

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Functional Descriptions
VMDS-10492 VSC7440 Datasheet Revision 4.2
6
Figure 1 •
RTL Block Diagram
3.1
Register Notations
This datasheet uses the following general register notations.
<TARGET>:<REGISTER_GROUP>:<REGISTER>.<FIELD>
<REGISTER_GROUP> is not always present. In that case the following notation is used:
<TARGET>::<REGISTER>.<FIELD>
When a register group does exist, it is always prepended with a target in the notation.
In sections where only one register is discussed or the target (and register group) is known from the
context, the <TARGET>:<REGISTER_GROUP>: may be omitted for brevity leading to the following
notation:
<REGISTER>.<FIELD>
When a register contains only one field, the .<FIELD> is not included in the notation.
When referring to a specific instance of a register group, specific register instance, or a specific bit in a
field, square brackets are used, for example:
<TARGET>:<REGISTER_GROUP>[<register group instance>]:<REGISTER>.<FIELD>
<TARGET>:<REGISTER_GROUP>:<REGISTER>[<register instance>].<FIELD>
<TARGET>:<REGISTER_GROUP>:<REGISTER>.<FIELD>[<bit number>]
3.2
Functional Overview
This section provides an overview of all the major blocks and functions involved in the forwarding
operation in the same order as a frame traverses through the device. It also outlines other major
functionality of the devices, such as the CPU subsystem and IEEE 1588 PTP processing.
The following illustration shows the VSC7440 block diagram.
ASM
LBK
DSM
REW
ANA
ANA_CL
ANA_L3
ANA_ACL
ANA_L2
ANA_AC
LRN
VCAP_SUPER
LPM
IS2
CLM
VCAP_ES0
DEV2G5
DEV10G
DEV2G5
DEV10G
x11
x2
DEVCPU
DEV1G
x5
SERDES1G
DEV1G
x2
SERDES6G
DEV1G
x4
SERDES10G
Priority-based flow control
FDMA
Manual
VCore-III
CPU I/F
MIPS
24KEc
SQS
OQS
IQS
HSCH
AFI
VD0
VD1
Normal
REW
QSYS
QRES
QFWD
HSIO
HSIO
Register target
DEV1G
x2
CuPHY
XGANA/DIG/XFI/KR
Loopback



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