VSC7440 datasheet(47/444 Pages) MICROSEMI

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Functional Descriptions

VMDS-10492 VSC7440 Datasheet Revision 4.2

default values. Fields that are described as sticky are only returned to defaults if sticky-reset is disabled

through PHY_CTRL_STAT_EXT::STICKY_RESET_ENA. Otherwise, they retain their values from prior to

the software reset. A hardware reset always brings all PHY registers back to their default values.

3.8.2

Cat5 Twisted Pair Media Interface

The twisted pair interfaces are compliant with IEEE 802.3-2008 and IEEE 802.3az for Energy Efficient

Ethernet.

3.8.2.1

Voltage-Mode Line Driver

Unlike many other gigabit PHYs, this PHY uses a patented voltage-mode line driver that allows it to fully

integrate the series termination resistors (required to connect the PHY’s Cat5 interface to an external 1:1

transformer). Also, the interface does not require placement of an external voltage on the center tap of

the magnetic. The following illustration shows the connections.

Figure 10 •

Cat5 Media Interface

3.8.2.2

Cat5 Auto-Negotiation and Parallel Detection

The integrated transceivers support twisted pair auto-negotiation as defined by clause 28 of the IEEE

802.3-2008. The auto-negotiation process evaluates the advertised capabilities of the local PHY and its

link partner to determine the best possible operating mode. In particular, auto-negotiation can determine

speed, duplex configuration, and master or slave operating modes for 1000BASE-TX. Auto-negotiation

also allows the device to communicate with the link partner (through the optional “next pages”) to set

attributes that may not otherwise be defined by the IEEE standard.

If the Cat5 link partner does not support auto-negotiation, the device automatically use parallel detection

to select the appropriate link speed.

Auto-negotiation can be disabled by clearing PHY_CTRL.AUTONEG_ENA. If auto-negotiation is

disabled, the state of the SPEED_SEL_MSB_CFG, SPEED_SEL_LSB_CFG, and

DUPLEX_MODE_CFG fields in the PHY_CTRL register determine the device’s operating speed and

n_D0P

n_D0N

n_D1P

n_D1N

n_D2P

n_D2N

n_D3P

n_D3N

PHY Port_

Transformer

A+

A–

B+

B–

C+

C–

D+

D–

RJ-45

1000 pF,

2 kV

0.1 µF

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