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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ATtiny167-ESSZ датащи(PDF) 205 Page - ATMEL Corporation |
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ATtiny167-ESSZ датащи(HTML) 205 Page - ATMEL Corporation |
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205 / 282 page  205 7728D–AVR–07/09 ATtiny87/ATtiny167 17.11 Register Description 17.11.1 ADMUX – ADC Multiplexer Selection Register • Bit 7:6 – REFS1:REFS0: Voltage Reference Selection Bits These bits and AREFEN bit from the Analog Miscellaneous Control Register (AMISCR) select the voltage reference for the ADC, as shown in Table 17-4. If these bits are changed during a conversion, the change will not go in effect until this conversion is complete (ADIF in ADCSRA register is set). Whenever these bits are changed, the next conversion will take 25 ADC clock cycles. If active channels are used, using AVCC or an external AREF higher than (AVcc - 1V) is not recommended, as this will affect ADC accuracy. The internal voltage reference options may not be used if an external voltage is being applied to the AREF pin. • Bit 5 – ADLAR: ADC Left Adjust Result The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data Regis- ter. Write one to ADLAR to left adjust the result. Otherwise, the result is right adjusted. Changing the ADLAR bit will affect the ADC Data Register immediately, regardless of any ongoing conversions. For a complete description of this bit, see “ADCL and ADCH – The ADC Data Register” on page 208. • Bits 4:0 – MUX4:0: Analog Channel and Gain Selection Bits These bits select which combination of analog inputs are connected to the ADC. In case of dif- ferential input, gain selection is also made with these bits. Refer to Table 17-5 for details. If these bits are changed during a conversion, the change will not go into effect until this conversion is complete (ADIF in ADCSRA register is set). Bit 7 6543210 REFS1 REFS0 ADLAR MUX4 MUX3 MUX2 MUX1 MUX0 ADMUX Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0 0000000 Table 17-4. Voltage Reference Selections for ADC REFS1 REFS0 AREFEN Voltage Reference (VREF) Selection X 0 0 AVcc used as Voltage Reference, diconnected from AREF pin. X 0 1 External Voltage Reference at AREF pin (AREF ≥ 2.0V) 0 1 0 Internal 1.1V Voltage Reference . 1 1 0 Internal 2.56V Voltage Reference . |
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