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DA16200 датащи(PDF) 116 Page - Renesas Technology Corp

номер детали DA16200
подробное описание детали  Ultra Low Power Wi-Fi SoC
PDF  154 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

DA16200 датащи(HTML) 116 Page - Renesas Technology Corp

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DA16200
Ultra Low Power Wi-Fi SoC
Datasheet
Revision 3.6
04-Jan-2023
CFR0011-120-00
116 of 153
© 2023 Renesas Electronics
Table 168: HIF_WB_TMO_CNT (0x5003_0038)
Bit
Mode
Symbol
Description
Reset
31:0
R/W
WB_TMO_CNT
Read Data Time-Out Count Register
This register specifies the number of host clock
cycles for the read data time-out interrupt if the read
data does not return to the host before the specified
clock cycles
32'h0A00_0000
Table 169: HIF_RSP_CIX_ST (0x5003_003C)
Bit
Mode
Symbol
Description
Reset
31:8
-
-
Reserved
7
R
RSP_STR_B
Status of the Start bit of the received response
R2 Response: RSP[135]
Other Responses: RSP[47]
1'b0
6
R
RSP_DIR_B
Status of the Direction (Transmission) bit of the received
response
R2 Response: RSP[134]
Other Responses: RSP[46]
1'b0
5:0
R
RSP_CMD_IDX
Status of the Command Index of the received response
R2 Response: RSP[133:128]
Other Responses: RSP[45:40]
6'h0
Table 170: HIF_RSP_ARG_0 (0x5003_0040)
Bit
Mode
Symbol
Description
Reset
31:0
R
RSP_ARG_0
Status of the received response argument-0
R2 Response: RSP[127:96]
Other Responses: RSP[39:8]
32'h00
Table 171: HIF_RSP_ARG_1 (0x5003_0044)
Bit
Mode
Symbol
Description
Reset
31:0
R
RSP_ARG_1
Status of the received response argument-1
R2 Response: RSP[95:64]
Other Responses: Reserved
32'h00
Table 172: HIF_RSP_ARG_2 (0x5003_0048)
Bit
Mode
Symbol
Description
Reset
31:0
R
RSP_ARG_2
Status of the received response argument-2
R2 Response: RSP[63:32]
Other Responses: Reserved
32'h00
Table 173: HIF_RSP_ARG_3 (0x5003_004C)
Bit
Mode
Symbol
Description
Reset
31:0
R
RSP_ARG_3
Status of the received response argument-3
R2 Response: RSP[31:0]
Other Responses: Reserved
32'h00



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