DA16200 datasheet(97/154 Pages) RENESAS

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DA16200

Ultra Low Power Wi-Fi SoC

Datasheet

Revision 3.6

04-Jan-2023

CFR0011-120-00

97 of 153

Bit

Mode

Symbol

Description

Reset

11:8

Error status for data read. These bits cannot be read

when UART_WAEN is enabled.

[11] Overrun Error

[10] Break Error

[9] Parity Error

[8] Framing Error

0x0

7:0

R/W

DATA

Receive data bits for data read

Transmit data bits for data write

0x00

Table 133: UART_RXSTS / UART_ERRCLR (0x004)

Bit

Mode

Symbol

Description

Reset

15:8

Reserved

0x00

7:0

UART_ERRCLR, A write to this register clears every

error. The value is not important

0x00

7:4

UART_RXSTS, Reserved

0x0

3:0

UART_RXSTS, UART error status

[3] Overrun error

[2] Break error

[1] Parity error

[0] Framing error

0x0

Table 134: UART_FLAG (0x018)

Bit

Mode

Symbol

Description

Reset

15:8

Reserved

0x00

7:4

The status of FIFOs

[7] TXFE, Transmit FIFO empty

[6] RXFF, Receive FIFO full

[5] TXFF, Transmit FIFO full

[4] RXFE, Receive FIFO empty

0x9

BUSY

UART busy. This bit is set to 1 as soon as the transmit

FIFO becomes non-empty

0x0

2:0

Reserved

0x0

Table 135: UART_INTBRDIV (0x024)

Bit

Mode

Symbol

Description

Reset

15:0

R/W

IBRD

Integer baud rate divisor

0x0000

Table 136: UART_FRABRDIV (0x028)

Bit

Mode

Symbol

Description

Reset

15:6

Reserved

0x000

5:0

R/W

FBRD

Fractional baud rate divisor

0x00

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