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DA16200 датащи(PDF) 61 Page - Renesas Technology Corp |
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DA16200 датащи(HTML) 61 Page - Renesas Technology Corp |
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61 / 154 page ![]() DA16200 Ultra Low Power Wi-Fi SoC Datasheet Revision 3.6 04-Jan-2023 CFR0011-120-00 61 of 153 © 2023 Renesas Electronics DA16200 I2C_CLK I2C_SDA VDD_IO Figure 35: I2C Pull-up Resistor Pull-up resistor values may vary based on the board layout. 9.6 SD/eMMC The SD/eMMC host interface of the DA16200 provides access to SD or eMMC memory cards. The SD/eMMC host interface supports a 4-bit data bus with a maximum clock rate of 48 MHz giving a maximum data rate of 24 MB/s (192 Mbps). The SD/eMMC pin mux condition is defined in Table 46. Table 46: SD/eMMC Master Pin Configuration Pin Name Pin Number I/O Function Name QFN fcCSP GPIOA4 34 F4 I/O SD/eMMC_CMD GPIOA5 33 D2 O SD/eMMC_CLK GPIOA9 29 H2 I/O SD/eMMC_D0 GPIOA8 30 G3 I/O SD/eMMC_D1 GPIOA7 31 E1 I/O SD/eMMC_D2 GPIOA6 32 E3 I/O SD/eMMC_D3 GPIOA10 28 F2 I SD/eMMC_WRP GPIOA1 38 C3 I 9.6.1 Block Diagram Figure 36 shows the block diagram of the SD/eMMC host interface including the control register, clock control, command/response pipe, data pipe, and AHB master interface blocks. |
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