DA16200 datasheet(99/154 Pages) RENESAS

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DA16200

Ultra Low Power Wi-Fi SoC

Datasheet

Revision 3.6

04-Jan-2023

CFR0011-120-00

99 of 153

Bit

Mode

Symbol

Description

Reset

7:1

Reserved

0x00

R/W

UARTEn

UART enable

0 = UART is disabled

1 = UART is enabled

0x0

Table 139: UART_INTFLS (0x034)

Bit

Mode

Symbol

Description

Reset

15:6

Reserved

0x000

5:3

R/W

RXIFLS

UART receive interrupt FIFO level select. The receive

interrupt occurs as follows:

b'000 = Receive FIFO ≥ 1/8 full

b'001 = Receive FIFO ≥ 1/4 full

b'010 = Receive FIFO ≥ 1/2 full

b'011 = Receive FIFO ≥ 3/4 full

b'100 = Receive FIFO ≥ 7/8 full

b'101 b'111 = Reserved

0b010

2:0

R/W

TXIFLS

UART transmit interrupt FIFO level select. The

transmit interrupt occurs as follows:

b'000 = Transmit FIFO ≤ 1/8 full

b'001 = Transmit FIFO ≤ 1/4 full

b'010 = Transmit FIFO ≤ 1/2 full

b'011 = Transmit FIFO ≤ 3/4 full

b'100 = Transmit FIFO ≤ 7/8 full

b'101 b'111 = Reserved

0b010

Table 140: UART_INTMSKSC (0x038)

Bit

Mode

Symbol

Description

Reset

15:11

Reserved

0x00

10:7

R/W

Error interrupt mask

[10] = Overrun error interrupt mask

[9] = Break error interrupt mask

[8] = Parity error interrupt mask

[7] = Framing error interrupt mask

0x0

R/W

RXTIM

Receive timeout interrupt mask

0x0

R/W

TXIM

Transmit interrupt mask

0x0

R/W

RXIM

Receive interrupt mask

0x0

3:0

Reserved

0x0

Table 141: UART_INTMSKSTS (0x040)

Bit

Mode

Symbol

Description

Reset

15:11

Reserved

0x00

10:7

Error interrupt mask

[10] = Overrun error interrupt mask

0x0

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