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VSC8221 датащи(PDF) 118 Page - Microsemi Corporation |
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VSC8221 датащи(HTML) 118 Page - Microsemi Corporation |
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118 / 138 page ![]() VSC8221 Data Sheet VMDS-10106 Revision 4.1 December 2006 118 of 123 123 28 SYSTEM TIMING SPECIFICATIONS 28.1 JTAG Timing The following specifications are valid only when the i/O power supply (VDDiOCTRL) is at either 3.3 V, ±5%, or 2.5 V, ±5%. Figure 24. JTAG interface AC Timing Table 53. JTAG Timing Specifications Symbol Min Typ Max Unit Parameter Description & Conditions TTCK-Period 100 ns TCK period. TTCK-High 45 ns TCK minimum pulse width high. TTCK-Low 45 ns TCK minimum pulse width low. TTDi/TMS-Setup 10 ns (TMS or TDi) to TCK setup time. TTDi/TMS-Hold 10 ns (TMS or TDi) to TCK hold time. TTDO-Delay 15 ns TDO delay from TCK. TCK TDI TMS T TDI/TMS-Setup T TDI/TMS-Hold T TCK-Period T TCK-High T TCK-Low T TDO-Delay TDO |
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