VSC8221 datasheet(7/138 Pages) MICROSEMI

7 / 138 page

VSC8221

Data Sheet

VMDS-10106 Revision 4.1

December 2006

7 of 10

12.3 SMi interrupt ....................................................................................................................................... 40

LED interface ................................................................................................................................................................. 41

13.1 Serial LED Output ............................................................................................................................... 43

Test Mode interface (JTAG) ......................................................................................................................................... 44

14.1 Supported instructions and instruction Codes .................................................................................... 45

14.2 Boundary-Scan Register Cell Order ................................................................................................... 46

Enhanced ActiPHY Power Management ................................................................................................................... 47

15.1 Operation in Enhanced ActiPHY Mode .............................................................................................. 47

15.2 Low-Power State ................................................................................................................................ 48

15.3 LP Wake-Up State .............................................................................................................................. 48

15.4 Normal Operating State ...................................................................................................................... 48

Ethernet in-line Powered Device Support ................................................................................................................ 49

16.1 Cisco in-Line Powered Device Detection Mode ................................................................................. 49

16.2 in-Line Power Ethernet Switch Diagram ............................................................................................. 49

16.3 in-Line Powered Device Detection (Cisco Method) ............................................................................ 50

16.4 iEEE 802.3af (DTE Power via MDi) .................................................................................................... 50

Advanced Test Modes .................................................................................................................................................. 51

17.1 Ethernet Packet Generator (EPG) ...................................................................................................... 51

17.2 CRC Counter ...................................................................................................................................... 51

17.3 Far-End Loopback .............................................................................................................................. 51

17.4 Near-End Loopback ............................................................................................................................ 52

17.5 Connector Loopback .......................................................................................................................... 52

Hardware Configuration Using CMODE pins ........................................................................................................... 53

18.1 Setting the CMODE Configuration Bits ............................................................................................... 53

18.2 CMODE Bit Descriptions .................................................................................................................... 54

18.3 Procedure for Selecting CMODE Pin Pull-Up/Pull-Down Resistor Values ......................................... 56

EEPROM interface ........................................................................................................................................................ 57

19.1 Programming Multiple VSC8221s Using the Same EEPROM ........................................................... 57

PHY Startup and initialization ..................................................................................................................................... 61

PHY Operating Modes .................................................................................................................................................. 62

PHY Register Set Conventions ................................................................................................................................... 63

22.1 PHY Register Set Structure ................................................................................................................ 63

22.2 PHY Register Set Nomenclature ........................................................................................................ 64

22.3 PHY Register Bit types ....................................................................................................................... 64

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