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VSC8221 датащи(PDF) 53 Page - Microsemi Corporation |
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VSC8221 датащи(HTML) 53 Page - Microsemi Corporation |
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53 / 138 page ![]() VSC8221 Data Sheet VMDS-10106 Revision 4.1 December 2006 53 of 56 56 18 HARDWARE CONFIGURATION USING CMODE PINS Each of the four CMODE pins (CMODE[3:0]) are used to latch a four bit value at PHY reset. A total of sixteen CMODE configuration bits are set at reset. Each CMODE bit represents the default value of a particular PHY register bit and therefore sets a default PHY operating condition at startup. 18.1 Setting the CMODE Configuration Bits The CMODE bits are set by connecting each CMODE pin to either VDD33A or VSS (ground) through an external 1% resistor. The four bit value latched by the PHY on each CMODE pin depends upon the value of the resistor used to pull-up or pull-down the CMODE pin. CMODE resistor values and connections are defined in the following table: Table 25. CMODE Pull-up/Pull-down Resistor Values CMODE bit 3 value CMODE bit 2 value CMODE bit 1 value CMODE bit 0 value CMODE Resistor Value Tied to VDD33A or GND 00000 GND 0001 2.26k GND 0010 4.02k GND 0011 5.90k GND 010 0 8.25k GND 0101 12.1k GND 0110 16.9k GND 0111 22.6k GND 10000 VDD33A 1001 2.26k VDD33A 1010 4.02k VDD33A 1011 5.90k VDD33A 1100 8.25k VDD33A 1101 12.1k VDD33A 1110 16.9k VDD33A 1111 22.6k VDD33A |
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