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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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VSC8221 датащи(PDF) 86 Page - Microsemi Corporation |
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VSC8221 датащи(HTML) 86 Page - Microsemi Corporation |
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86 / 138 page  VSC8221 Data Sheet VMDS-10106 Revision 4.1 December 2006 86 of 106 106 23.2.24 Register 23 (17h) – PHY Control Register #1 23.15:12, 2:1– MAC/Media interface Mode Select Bits 23.15:12 and 23.2:1 are used to select the MAC interface modes and media interface modes. The reset value for these bits is dependent upon the state of the MAC interface bits in the CMODE hardware configuration. All combinations of these bits not indicated below are reserved: Note: For more information about VSC8221 operating modes, see Designing a Copper SFP using the VSC8221 application note available on the Microsemi Web site. Register 23 (17h) – PHY Control Register #1 Bit Name Access States Reset Value Sticky 15:12 MAC/Media interface Mode Select RWSW See Table 33 below CMODE 11:4 Reserved1 1 Writes to Mii Register 23 must preserve the value of bits 11:4, i.e., all writes to Mii Register 23 must be in the format xA2xh. RO 1010 0010 3 Far End (Media-Side) Loopback Enable R/W 1 = Far End (Media side) loopback is enabled 0 = Far End (Media side) loopback is disabled 0 2:1 MAC/Media interface Mode Select RWSW See Table 33 below CMODE 0 EEPROM Status RO 1 = EEPROM is detected on EEPROM interface 0 = EEPROM is not detected on EEPROM inter- face 0 Table 33. PHY Operating Modes Operating Mode Category Mii Register 23.15:12, 23.2:1 CMODE2 [3:0] MAC interface Media interface Other Settings Serial MAC PHY Oper- ating Modes 1111,00 0100 802.3z Ser- Des CAT5 Clause 37 disabled 1110, 01 1110 802.3z Ser- Des CAT5 Clause 37 enabled 1110,10 1010 802.3z Ser- Des CAT5 Clause 37 enabled, Media Convertor Mode 1110,00 0000 802.3z Ser- Des CAT5 With Clause 37 Auto-Negotiation Detection 1010,01 1111 SGMii CAT5 625Mhz SCLK Clock Disabled 1000,01 0101 SGMii CAT5 625MHz SCLK Clock Enabled 1001,00 SGMii CAT5 Modified Clause 37 Auto-Negotiation disabled, 625MHz SCLK Clock Enabled 1011,00 SGMii CAT5 Modified Clause 37 Auto-Negotiation disabled, 625MHz SCLK Clock Disabled |
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