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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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VSC8221 датащи(PDF) 64 Page - Microsemi Corporation |
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VSC8221 датащи(HTML) 64 Page - Microsemi Corporation |
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64 / 138 page  VSC8221 Data Sheet VMDS-10106 Revision 4.1 December 2006 64 of 64 64 22.2 PHY Register Set Nomenclature 22.3 PHY Register Bit types PHY Register bit types are defined in the table below: “Sticky” refers to the behavior of the register bit(s) after a software reset. if an “S” appears in the sticky column, the corresponding bit(s) will retain their values after a software reset, as long as Mii Register bit 22.9 - Sticky Reset Enable is set. if an “SS” appears in the sticky column, the corresponding bit(s) will retain their values after a software reset, regardless of the state of Mii Register bit 22.9 - Sticky Reset Enable. Table 30. Register Set Nomenclature Register Address Page View Naming Convention 0-15 - NA- Mii Register 16-31 PAGE0 Mii Register 16-31 PAGE1 Extended Page Mii Register (Referred to with an ‘E’ after the register number e.g. 20E.15 is Page 1 Register 20 bit 15) Table 31. PHY Register Bit Types Register Bit Type Description R/W Read and Write, effective immediately RO Read Only (must be written ‘0’, unless specified otherwise) RO SC Read Only, Self Clears after Read LH Latched High, Clears after Read LL Latched Low, Clears after Read SC Self-Cleared RWSW Read and Write, effective after s/w reset. This register will read the new value only after s/w reset. |
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