DP83916 datasheet(54/96 Pages) NSC

54 / 96 page

50 Bus Interface (Continued)

TLF11722 – 28

FIGURE 5-6 Bus Request Timing BMODEe1

542 Block Transfers

The SONIC-16 performs block operations during all bus ac-

tions thereby providing efficient transfers to memory The

block cycle consists of three parts The first part is the bus

acquisition phase as discussed above in which the SONIC-

16 gains access to the bus Once it has access of the bus

the SONIC-16 enters the second phase by transferring data

tofrom its internal FIFOs or registers fromto memory The

SONIC-16 transfers data from its FIFOs in either EXACT

BLOCK mode or EMPTYFILL

EXACT BLOCK mode

In this mode the number of words

(or long words) transferred during a block transfer is deter-

mined by either the Transmit or Receive FIFO thresholds

programmed in the Data Configuration Register

EMPTYFILL mode

In this mode the DMA completely fills

the Transmit FIFO during transmission or completely emp-

ties the Receive FIFO during reception This allows for

greater bus latency

When the SONIC-16 accesses the Descriptor Areas (ie

RRA RDA CDA and TDA) it transfers data between its

registers and memory All fields which need to be used are

accessed in one block operation Thus the SONIC-16 per-

forms 4 accesses in the RRA (see Section 3442) 7 ac-

cesses in the RDA (see Section 3461) 2 3 or 6 accesses

in the TDA (see Section 354) and 4 accesses in the CDA

543 Bus Status

The SONIC-16 presents three bits of status information on

pins S2 – S0 which indicate the type of bus operation the

SONIC-16 is currently performing (Table 5-2) Bus status is

valid when at the falling edge of AS or the rising edge of

ADS

TABLE 5-2 Bus Status

Status

The bus is idle The SONIC-16 is not

performing any transfers on the bus

The Transmit Descriptor Area (TDA) is

currently being accessed

The Transmit Buffer Area (TBA) is

currently being read

The Receive Buffer Area (RBA) is

currently being written to Only data is

being written though not a Source or

Destination address

The Receive Buffer Area (RBA) is

currently being written to Only the

Source or Destination address is being

written though

The Receive Resource Area (RRA) is

currently being read

The Receive Descriptor Area (RDA) is

currently being accessed

The CAM Descriptor Area (CDA) is

currently being accessed

DP83916 датащи(PDF) 54 Page - National Semiconductor (TI)

DP83916 датащи(HTML) 54 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96

датащи скачать

ссылки URL