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PI7C8150BMA-33 датащи(PDF) 96 Page - Pericom Semiconductor Corporation |
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PI7C8150BMA-33 датащи(HTML) 96 Page - Pericom Semiconductor Corporation |
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96 / 107 page ![]() PI7C8150B ASYNCHRONOUS 2-PORT PCI-TO-PCI BRIDGE Page 96 of 107 April 2015 – Revision 2.1 This mode of operation is valuable for design debugging and fault diagnosis since it permits examination of connections not normally accessible to the test system. The following subsections describe the boundary-scan test logic elements: TAP pins, instruction register, test data registers and TAP controller. Figure 16-1 illustrates how these pieces fit together to form the JTAG unit. Figure 16-1 Test Access Port Block Diagram 16.1.1 TAP PINS The PI7C8150B’s TAP pins form a serial port composed of four input connections (TMS, TCK, TRST_L and TDI) and one output connection (TDO). These pins are described in Table 16-1. The TAP pins provide access to the instruction register and the test data registers. 16.1.2 INSTRUCTION REGISTER The Instruction Register (IR) holds instruction codes. These codes are shifted in through the Test Data Input (TDI) pin. The instruction codes are used to select the specific test operation to be performed and the test data register to be accessed. The instruction register is a parallel-loadable, master/slave-configured 5-bit wide, serial- shift register with latched outputs. Data is shifted into and out of the IR serially through the TDI pin clocked by the rising edge of TCK. The shifted-in instruction becomes active upon latching from the master stage to the slave stage. At that time the IR outputs along with the TAP finite state machine outputs are decoded to select and control the test data register selected by that instruction. Upon latching, all actions caused by any previous instructions terminate. The instruction determines the test to be performed, the test data register to be accessed, or both. The IR is two bits wide. When the IR is selected, the most significant bit is connected to TDI, and the least significant bit is connected to TDO. The value presented on the TDI pin is shifted into the IR on each rising edge of TCK. The TAP controller captures fixed 15-0048 |
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