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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PIC18F23K22-E/ML датащи(PDF) 135 Page - Microchip Technology |
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PIC18F23K22-E/ML датащи(HTML) 135 Page - Microchip Technology |
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135 / 496 page  2010 Microchip Technology Inc. Preliminary DS41412C-page 135 PIC18(L)F2X/4XK22 RA6/CLKO/OSC2 RA6 01 O DIG LATA<6> data output; enabled in INTOSC modes when CLKO is not enabled. 10 I TTL PORTA<6> data input; enabled in INTOSC modes when CLKO is not enabled. CLKO x1 O DIG In RC mode, OSC2 pin outputs CLKOUT which has 1/4 the frequency of OSC1 and denotes the instruction cycle rate. OSC2 xx O XTAL Oscillator crystal output; connects to crystal or resonator in Crystal Oscillator mode. RA7/CLKI/OSC1 RA7 01 O DIG LATA<7> data output; disabled in external oscillator modes. 10 I TTL PORTA<7> data input; disabled in external oscillator modes. CLKI x1 I AN External clock source input; always associated with pin function OSC1. OSC1 xx I XTAL Oscillator crystal input or external clock source input ST buffer when configured in RC mode; CMOS otherwise. TABLE 10-1: PORTA I/O SUMMARY (CONTINUED) Pin Name Function TRIS Setting ANSEL Setting Pin Type Buffer Type Description Legend: AN = Analog input or output; TTL = TTL compatible input; HV = High Voltage; OD = Open Drain; XTAL = Crystal; CMOS = CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels; I2CTM = Schmitt Trigger input with I2C. TABLE 10-2: REGISTERS ASSOCIATED WITH PORTA Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register on Page ANSELA — — ANSA5 — ANSA3 ANSA2 ANSA1 ANSA0 152 CM1CON0 C1ON C1OUT C1OE C1POL C1SP C1R C1CH<1:0> 310 CM2CON0 C2ON C2OUT C2OE C2POL C2SP C2R C2CH<1:0> 311 VREFCON1 DACEN DACLPS DACOE — DACPSS<1:0> — DACNSS 341 VREFCON2 — — — DACR<4:0> 342 HLVDCON VDIRMAG BGVST IRVST HLVDEN HLVDL<3:0> 343 PORTA RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0 151 SLRCON — — — SLRE SLRD SLRC SLRB SLRA 156 SRCON0 SRLEN SRCLK<2:0> SRQEN SRNQEN SRPS SRPR 335 SSP1CON1 WCOL SSPOV SSPEN CKP SSPM<3:0> 256 T0CON TMR0ON T08BIT T0CS T0SE PSA T0PS<2:0> 157 TRISA TRISA7 TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 154 Legend: — = unimplemented locations, read as ‘0’. Shaded bits are not used for PORTA. TABLE 10-3: CONFIGURATION REGISTERS ASSOCIATED WITH PORTA Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register on Page CONFIG1H IESO FCMEN PRICLKEN PLLCFG FOSC<3:0> 351 Legend: — = unimplemented locations, read as ‘0’. Shaded bits are not used for PORTA. |
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